RISC architecture

A RISC architecture is a computer processor design that uses a small, highly optimized set of simple instructions to achieve high performance through efficient pipelining and parallelism.

Observed surface forms (6)

• SPARC version ×3
• PowerPC architecture processor ×1
• RISC microprocessor architecture ×1
• instruction set architecture concept ×1
• reduced instruction set computer architecture ×1
• reduced instruction set computing architecture ×1

Instances (11)

• ARM
• RISC-V via concept surface "reduced instruction set computing architecture"
• MIPS
• Power ISA via concept surface "reduced instruction set computer architecture"
• Power Architecture
• Motorola 88000 family via concept surface "RISC microprocessor architecture"
  surface form: Motorola 88000
• PowerPC
• SPARC microprocessor architecture
  surface form: SPARC
• Acorn RISC Machine
• PowerPC G4 via concept surface "PowerPC architecture processor"
• Harvard architecture via concept surface "instruction set architecture concept"