POWER2 RISC processor
E839024
The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
All labels observed (2)
| Label | Occurrences |
|---|---|
| POWER2 RISC processor canonical | 1 |
| POWER2 Super Chip | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T10067918 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: POWER2 RISC processor Context triple: [POWER2, alsoKnownAs, POWER2 RISC processor]
-
A.
MIPS R2000
The MIPS R2000 is an early 32-bit RISC microprocessor that helped popularize the MIPS architecture in academic and commercial systems during the late 1980s.
-
B.
RISC II
RISC II is an early experimental reduced instruction set computer (RISC) processor developed at UC Berkeley that significantly shaped the design of later RISC architectures.
-
C.
Risc PC
Risc PC is a modular personal computer introduced by Acorn Computers in the 1990s, known for its RISC-based architecture and expandability.
-
D.
MIPS R5000
The MIPS R5000 is a 64-bit RISC microprocessor from the MIPS family, widely used in mid-1990s workstations and embedded systems for its balance of performance and cost.
-
E.
Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: POWER2 RISC processor Target entity description: The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
-
A.
MIPS R2000
The MIPS R2000 is an early 32-bit RISC microprocessor that helped popularize the MIPS architecture in academic and commercial systems during the late 1980s.
-
B.
RISC II
RISC II is an early experimental reduced instruction set computer (RISC) processor developed at UC Berkeley that significantly shaped the design of later RISC architectures.
-
C.
Risc PC
Risc PC is a modular personal computer introduced by Acorn Computers in the 1990s, known for its RISC-based architecture and expandability.
-
D.
MIPS R5000
The MIPS R5000 is a 64-bit RISC microprocessor from the MIPS family, widely used in mid-1990s workstations and embedded systems for its balance of performance and cost.
-
E.
Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
- F. None of above. chosen
Statements (44)
| Predicate | Object |
|---|---|
| instanceOf |
IBM POWER architecture processor
ⓘ
microprocessor ⓘ |
| addressBusWidth | 32-bit ⓘ |
| alsoKnownAs | POWER2 RISC processor NERFINISHED ⓘ |
| applicationDomain |
enterprise computing
ⓘ
scientific supercomputing clusters ⓘ |
| architecture | POWER ⓘ |
| cacheConfiguration | supports large external L2 cache ⓘ |
| category | high-performance RISC CPU ⓘ |
| dataPathWidth | 64-bit ⓘ |
| designedBy | IBM Austin design center NERFINISHED ⓘ |
| designGoal |
high performance
ⓘ
support for scientific computing ⓘ |
| executionModel | superscalar ⓘ |
| family | IBM POWER family ⓘ |
| floatingPointPerformance | enhanced versus POWER1 ⓘ |
| floatingPointUnit | on-chip FPU ⓘ |
| generation | second-generation POWER ⓘ |
| instructionSetArchitecture | POWER ISA NERFINISHED ⓘ |
| integerUnit | multiple integer execution units ⓘ |
| introductionPeriod |
early 1990s
ⓘ
mid 1990s ⓘ |
| isSecondGenerationOf | IBM POWER microprocessors NERFINISHED ⓘ |
| manufacturer | IBM NERFINISHED ⓘ |
| market |
servers
ⓘ
workstations ⓘ |
| notableSystem |
IBM RS/6000 Model 590
NERFINISHED
ⓘ
IBM RS/6000 Model 990 NERFINISHED ⓘ |
| pipeline | superscalar pipeline ⓘ |
| predecessor | POWER1 NERFINISHED ⓘ |
| successor | POWER3 NERFINISHED ⓘ |
| supports |
32-bit applications
ⓘ
64-bit floating-point operations ⓘ 64-bit integer operations ⓘ out-of-order-like parallel execution of multiple instructions per cycle ⓘ |
| targetOperatingSystem | AIX ⓘ |
| technologyNode | CMOS ⓘ |
| usedFor |
engineering applications
ⓘ
scientific simulations ⓘ technical computing ⓘ |
| usedIn |
IBM RS/6000 servers
NERFINISHED
ⓘ
IBM RS/6000 workstations NERFINISHED ⓘ |
| vendorPlatform | IBM AIX systems NERFINISHED ⓘ |
| wordSize | 64-bit ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: POWER2 RISC processor Description of subject: The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
POWER2 Super Chip