MIPS

E37330

RISC architecture instruction set architecture

MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.

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All labels observed (25)

Label	Occurrences
MIPS canonical	37
MIPS architecture	16
MIPS Computer Systems	5
MIPS I	2
MIPS R10000	2
MIPS R12000	2
MIPS32	2
MIPS64	2
MIPS DSP extensions	1
MIPS I architecture	1
MIPS II	1
MIPS III	1
MIPS IV	1
MIPS MT (multithreading)	1
MIPS R14000	1
MIPS R3000	1
MIPS R4000	1
MIPS R4000 series	1
MIPS R5000	1
MIPS V	1
MIPS control unit	1
MIPS16	1
microMIPS	1
n32 ABI	1
nanoMIPS	1

Statements (69)

Predicate	Object
instanceOf	RISC architecture ⓘ instruction set architecture ⓘ
abbreviationFor	Microprocessor without Interlocked Pipeline Stages ⓘ
architectureStyle	load-store architecture ⓘ register-register architecture ⓘ
commonlyTaughtWith	MARS simulator ⓘ SPIM ⓘ surface form: QtSPIM simulator SPIM ⓘ surface form: SPIM simulator
countryOfOrigin	United States of America ⓘ surface form: United States
designedBy	MIPS self-linksurface differs ⓘ surface form: MIPS Computer Systems
endianness	big-endian ⓘ little-endian ⓘ
fullName	Microprocessor without Interlocked Pipeline Stages ⓘ
hasCallingConvention	MIPS self-linksurface differs ⓘ surface form: n32 ABI n64 ABI ⓘ o32 ABI ⓘ
hasCoprocessor	CP0 system control coprocessor ⓘ CP1 floating-point coprocessor ⓘ
hasExtension	MIPS DSP extensions ⓘ MIPS SIMD extensions ⓘ MIPS16e compressed instruction set ⓘ
hasFeature	coprocessor interface ⓘ delayed branches ⓘ delayed loads ⓘ
hasRegister	$ra return address register ⓘ $sp stack pointer ⓘ $zero register ⓘ HI special register ⓘ LO special register ⓘ
hasVariant	MIPS self-linksurface differs ⓘ surface form: MIPS I MIPS self-linksurface differs ⓘ surface form: MIPS II MIPS self-linksurface differs ⓘ surface form: MIPS III MIPS self-linksurface differs ⓘ surface form: MIPS IV MIPS self-linksurface differs ⓘ surface form: MIPS V MIPS self-linksurface differs ⓘ surface form: MIPS32 MIPS self-linksurface differs ⓘ surface form: MIPS64 MIPS self-linksurface differs ⓘ surface form: microMIPS MIPS self-linksurface differs ⓘ surface form: nanoMIPS
influenced	Acorn RISC Machine ⓘ surface form: ARM architecture RISC-V ⓘ
instructionLength	fixed 32-bit instructions ⓘ
introduced	1980s ⓘ
operatingSystemSupport	BSD variants ⓘ Linux ⓘ embedded real-time operating systems ⓘ
pipelineFeature	fixed-length pipeline stages ⓘ
primaryUse	academic research ⓘ consumer electronics ⓘ embedded systems ⓘ networking equipment ⓘ
registerCount	32 general-purpose registers ⓘ
supports	32-bit implementations ⓘ 64-bit implementations ⓘ hardware exceptions ⓘ interrupts ⓘ memory-mapped I/O ⓘ virtual memory ⓘ
toolchainSupport	GNU Compiler Collection ⓘ surface form: GCC LLVM ⓘ
typicalUseInAcademia	teaching assembly language ⓘ teaching computer architecture ⓘ
usedIn	automotive systems ⓘ digital televisions ⓘ game consoles ⓘ network processors ⓘ printers ⓘ routers ⓘ set-top boxes ⓘ storage devices ⓘ

Referenced by (85)

Full triples — surface form annotated when it differs from this entity's canonical label.

Linux → supportsArchitecture → MIPS ⓘ

GNU Compiler Collection → supportsArchitecture → MIPS ⓘ

GNU Debugger → supportsArchitecture → MIPS ⓘ

Android Dalvik VM → supportsArchitecture → MIPS ⓘ

SGI → processorArchitecture → MIPS ⓘ

John L. Hennessy → knownFor → MIPS ⓘ

this entity surface form: MIPS architecture

John L. Hennessy → founded → MIPS ⓘ

this entity surface form: MIPS Computer Systems

John L. Hennessy → coFounded → MIPS ⓘ

this entity surface form: MIPS Computer Systems

RISC-V → inspiredBy → MIPS ⓘ

this entity surface form: MIPS architecture

RISC-V → competesWith → MIPS ⓘ

this entity surface form: MIPS architecture

MIPS → designedBy → MIPS self-linksurface differs ⓘ

this entity surface form: MIPS Computer Systems