Acorn RISC Machine

E72244

Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.

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Observed surface forms (3)


Statements (52)

Predicate Object
instanceOf RISC architecture
computer architecture family
instruction set architecture
applicationDomain consumer electronics
embedded systems
microcontrollers
mobile devices
networking equipment
personal computers
servers
smartphones
tablets
architectureType reduced instruction set computer
designGoal energy efficiency
high performance per watt
developer ARM
surface form: ARM Ltd

Acorn Computers
endianSupport bi-endian (many implementations)
little-endian
influenced energy-efficient CPU design trends
introduced 1980s
laterName Acorn RISC Machine self-linksurface differs
surface form: Advanced RISC Machines
licensingModel IP core licensing
architecture license
marketShare dominant in smartphone processors
notableImplementation ARM
surface form: ARM Cortex-A series

ARM Cortex-M series
ARM Cortex-R series
ARM Neoverse
originCountry United Kingdom NERFINISHED
powerCharacteristic low power consumption
registerFile load-store architecture
shortName ARM
supports 32-bit instruction set
ARMv7-A architecture
surface form: ARMv7 architecture

ARMv8-A
surface form: ARMv8-A architecture

ARMv9-A
surface form: ARMv9-A architecture

SIMD extensions (e.g., NEON)
Thumb instruction set
Thumb-2 instruction set
TrustZone security extension
surface form: TrustZone security extensions

hardware virtualization (in newer versions)
usedBy Apple A-series
surface form: Apple A-series SoCs

Apple M-series
surface form: Apple M-series SoCs

Broadcom
surface form: Broadcom SoCs

MediaTek SoCs
NVIDIA Jetson embedded modules
surface form: NVIDIA Tegra SoCs

Snapdragon system-on-chip
surface form: Qualcomm Snapdragon SoCs

Samsung Exynos SoCs
uses conditional execution of most instructions (classic ARM)
fixed-length instructions in classic ARM state
wordLength 32-bit

Referenced by (6)

Full triples — surface form annotated when it differs from this entity's canonical label.

RISC-V competesWith Acorn RISC Machine
this entity surface form: ARM architecture
Acorn Computers developed Acorn RISC Machine
ARM formerlyKnownAs Acorn RISC Machine
MIPS influenced Acorn RISC Machine
this entity surface form: ARM architecture
Acorn RISC Machine laterName Acorn RISC Machine self-linksurface differs
this entity surface form: Advanced RISC Machines
Arm Ltd. originalName Acorn RISC Machine
this entity surface form: Advanced RISC Machines Ltd.