Thumb instruction set

E356356

instruction set architecture reduced instruction set computing extension

The Thumb instruction set is a compact 16-bit subset of the ARM architecture designed to improve code density and efficiency on ARM-based processors.

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All labels observed (2)

Label	Occurrences
Thumb instruction set canonical	3
Thumb-2 instruction set	2

Statements (44)

Predicate	Object
instanceOf	instruction set architecture ⓘ reduced instruction set computing extension ⓘ
allows	mixed ARM and Thumb code in the same program ⓘ
alsoKnownAs	ARM ⓘ surface form: ARM Thumb state
architectureFamily	ARM ⓘ
benefit	potentially lower instruction cache miss rate ⓘ reduced memory footprint for firmware ⓘ smaller binaries compared to pure ARM code in many workloads ⓘ
bitWidth	16-bit ⓘ
category	embedded processor technology ⓘ
coexistsWith	32-bit ARM instruction set ⓘ
compatibleWith	ARM Cortex-M series ⓘ surface form: ARM Cortex-M family ARM Cortex-R series ⓘ surface form: ARM Cortex-R family ARM7TDMI ⓘ ARM9 ⓘ surface form: ARM9 family some ARM Cortex-A cores ⓘ
designGoal	improve code density ⓘ improve performance on memory-constrained systems ⓘ increase energy efficiency ⓘ reduce program memory usage ⓘ
encodingLength	16-bit fixed-length instructions ⓘ
executionModel	decoded into full-width ARM operations internally on some cores ⓘ
executionStateOf	ARM architecture processor modes ⓘ
hasSuccessor	Thumb instruction set self-linksurface differs ⓘ surface form: Thumb-2 instruction set
influenced	ARM Cortex-M series ⓘ surface form: ARM Cortex-M ISA design
introducedBy	ARM ⓘ surface form: ARM Holdings
introducedFor	ARM-based processors ⓘ
optimizationFor	narrow instruction fetch path ⓘ systems with limited instruction memory bandwidth ⓘ
partOf	ARM ⓘ surface form: ARM architecture
requires	ARMv4T or later architecture support ⓘ
selectedBy	T-bit in CPSR on ARMv4T and later ⓘ
subsetOf	ARM ⓘ surface form: ARM instruction set
supports	arithmetic and logical instructions ⓘ conditional branch instructions ⓘ load and store instructions ⓘ
targetUseCase	code-size-sensitive applications ⓘ embedded systems ⓘ microcontrollers ⓘ
tradeOff	fewer available registers in many instructions compared to ARM state ⓘ reduced instruction encoding space for improved code density ⓘ
usedIn	consumer electronics with ARM cores ⓘ industrial control systems based on ARM MCUs ⓘ microcontrollers running real-time operating systems ⓘ

Referenced by (5)

Full triples — surface form annotated when it differs from this entity's canonical label.

Acorn RISC Machine → supports → Thumb instruction set ⓘ

Thumb instruction set → hasSuccessor → Thumb instruction set self-linksurface differs ⓘ

this entity surface form: Thumb-2 instruction set

ARMv7-A architecture → supports → Thumb instruction set ⓘ

subject surface form: ARMv7-A

this entity surface form: Thumb-2 instruction set

ARMv5 architecture → supports → Thumb instruction set ⓘ

subject surface form: ARMv5

ARM Cortex-M series → supports → Thumb instruction set ⓘ