MIPS

E37330

MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.

All labels observed (25)

How this entity was disambiguated

Statements (69)

Predicate Object
instanceOf RISC architecture
instruction set architecture
abbreviationFor Microprocessor without Interlocked Pipeline Stages
architectureStyle load-store architecture
register-register architecture
commonlyTaughtWith MARS simulator
SPIM
surface form: QtSPIM simulator

SPIM
surface form: SPIM simulator
countryOfOrigin United States of America
surface form: United States
designedBy MIPS self-linksurface differs
surface form: MIPS Computer Systems
endianness big-endian
little-endian
fullName Microprocessor without Interlocked Pipeline Stages
hasCallingConvention MIPS self-linksurface differs
surface form: n32 ABI

n64 ABI
o32 ABI
hasCoprocessor CP0 system control coprocessor
CP1 floating-point coprocessor
hasExtension MIPS DSP extensions
MIPS SIMD extensions
MIPS16e compressed instruction set
hasFeature coprocessor interface
delayed branches
delayed loads
hasRegister $ra return address register
$sp stack pointer
$zero register
HI special register
LO special register
hasVariant MIPS self-linksurface differs
surface form: MIPS I

MIPS self-linksurface differs
surface form: MIPS II

MIPS self-linksurface differs
surface form: MIPS III

MIPS self-linksurface differs
surface form: MIPS IV

MIPS self-linksurface differs
surface form: MIPS V

MIPS self-linksurface differs
surface form: MIPS32

MIPS self-linksurface differs
surface form: MIPS64

MIPS self-linksurface differs
surface form: microMIPS

MIPS self-linksurface differs
surface form: nanoMIPS
influenced Acorn RISC Machine
surface form: ARM architecture

RISC-V
instructionLength fixed 32-bit instructions
introduced 1980s
operatingSystemSupport BSD variants
Linux
embedded real-time operating systems
pipelineFeature fixed-length pipeline stages
primaryUse academic research
consumer electronics
embedded systems
networking equipment
registerCount 32 general-purpose registers
supports 32-bit implementations
64-bit implementations
hardware exceptions
interrupts
memory-mapped I/O
virtual memory
toolchainSupport GNU Compiler Collection
surface form: GCC

LLVM
typicalUseInAcademia teaching assembly language
teaching computer architecture
usedIn automotive systems
digital televisions
game consoles
network processors
printers
routers
set-top boxes
storage devices

How these facts were elicited

Referenced by (85)

Full triples — surface form annotated when it differs from this entity's canonical label.

Microprocessor without Interlocked Pipeline Stages designedBy MIPS
this entity surface form: MIPS Computer Systems
Microprocessor without Interlocked Pipeline Stages hasVariant MIPS
this entity surface form: MIPS I
Microprocessor without Interlocked Pipeline Stages hasVariant MIPS
this entity surface form: MIPS32
Microprocessor without Interlocked Pipeline Stages hasVariant MIPS
this entity surface form: MIPS64
Microprocessor without Interlocked Pipeline Stages hasExtension MIPS
this entity surface form: MIPS16
Microprocessor without Interlocked Pipeline Stages hasExtension MIPS
this entity surface form: MIPS DSP extensions
Microprocessor without Interlocked Pipeline Stages hasExtension MIPS
this entity surface form: MIPS MT (multithreading)
o32 ABI architecture MIPS
CP1 floating-point coprocessor partOf MIPS
this entity surface form: MIPS architecture
CP1 floating-point coprocessor controlledBy MIPS
this entity surface form: MIPS control unit
CP1 floating-point coprocessor associatedWith MIPS
this entity surface form: MIPS I architecture
VxWorks targetPlatform MIPS
this entity surface form: MIPS architecture
Linux kernel supports MIPS
this entity surface form: MIPS architecture
RISC architecture isUsedIn MIPS
this entity surface form: MIPS architecture
John knownFor MIPS
subject surface form: John L. Hennessy
this entity surface form: MIPS architecture
John coFounded MIPS
subject surface form: John L. Hennessy
this entity surface form: MIPS Computer Systems
GNU/Linux platform MIPS
libunwind supports MIPS
this entity surface form: MIPS architecture
llvm-mc target MIPS
this entity surface form: MIPS architecture
musl targetArchitecture MIPS
GNU As supportsTarget MIPS
RISC I influenced MIPS
this entity surface form: MIPS architecture
RISC II influenced MIPS
this entity surface form: MIPS architecture