CP1 floating-point coprocessor

E193759

The CP1 floating-point coprocessor is a dedicated hardware unit used in MIPS architectures to perform floating-point arithmetic operations efficiently.

All labels observed (4)

Label Occurrences
CP1 floating-point coprocessor canonical 1
MIPS CP1 1
MIPS FPU 1

How this entity was disambiguated

Statements (41)

Predicate Object
instanceOf MIPS coprocessor
floating-point coprocessor
hardware unit
accessedBy MIPS coprocessor instructions
alsoKnownAs CP1 floating-point coprocessor
surface form: MIPS CP1

CP1 floating-point coprocessor
surface form: MIPS FPU

CP1 floating-point coprocessor
surface form: MIPS floating-point unit
associatedWith MIPS
surface form: MIPS I architecture

later MIPS architecture revisions
canBeAbsentIn low-cost MIPS implementations
canPairRegistersFor 64-bit double-precision values
communicatesWith MIPS main pipeline
conformsTo IEEE 754 floating‑point arithmetic standard
surface form: IEEE 754 floating-point standard
controlledBy MIPS
surface form: MIPS control unit
coprocessorNumber 1
designedFor floating-point arithmetic
emulatedBy software floating-point libraries when hardware CP1 is absent
handles floating-point exceptions
rounding modes
hasRegisterFile floating-point registers
hasStatusRegister floating-point control and status register
improves performance of floating-point operations
partOf MIPS
surface form: MIPS architecture
reduces floating-point computation latency compared to software emulation
registerCount 32 floating-point registers
registerWidth 32-bit floating-point registers
requires coprocessor enable bits in system control registers
supportsDataType double-precision floating-point
single-precision floating-point
supportsInstructionCategory floating-point arithmetic instructions
floating-point branch and compare
floating-point load and store
supportsOperation floating-point addition
floating-point comparison
floating-point conversion between integer and floating-point
floating-point division
floating-point multiplication
floating-point subtraction
usedIn embedded MIPS processors
general-purpose MIPS processors
usedWith MIPS integer core

How these facts were elicited

Referenced by (4)

Full triples — surface form annotated when it differs from this entity's canonical label.

MIPS hasCoprocessor CP1 floating-point coprocessor
CP1 floating-point coprocessor alsoKnownAs CP1 floating-point coprocessor
this entity surface form: MIPS CP1
CP1 floating-point coprocessor alsoKnownAs CP1 floating-point coprocessor
this entity surface form: MIPS floating-point unit
CP1 floating-point coprocessor alsoKnownAs CP1 floating-point coprocessor
this entity surface form: MIPS FPU