POWER Architecture, first generation
E758591
POWER Architecture, first generation refers to IBM’s original POWER1 RISC microprocessor design that formed the basis for the later POWER and PowerPC processor families.
All labels observed (1)
| Label | Occurrences |
|---|---|
| POWER Architecture, first generation canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T8814706 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: POWER Architecture, first generation Context triple: [POWER1, alsoKnownAs, POWER Architecture, first generation]
-
A.
REX Architecture
REX Architecture is a New York–based architecture firm known for its innovative, performance-driven designs and high-profile cultural projects worldwide.
-
B.
Architekton
Architekton is an Arizona-based architecture firm known for contemporary, context-sensitive public and cultural projects.
-
C.
Ericson Core
Ericson Core is an American cinematographer and film director known for his work on action-driven films such as "The Fast and the Furious" and the 2015 remake of "Point Break."
-
D.
360 Architecture
360 Architecture was a Kansas City–based architectural firm known for designing major sports venues and large-scale entertainment facilities, including MetLife Stadium.
-
E.
CoRE Building
The CoRE Building is a major academic and research facility on Rutgers University's Busch Campus, housing computer science and engineering departments, labs, and offices.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: POWER Architecture, first generation Target entity description: POWER Architecture, first generation refers to IBM’s original POWER1 RISC microprocessor design that formed the basis for the later POWER and PowerPC processor families.
-
A.
REX Architecture
REX Architecture is a New York–based architecture firm known for its innovative, performance-driven designs and high-profile cultural projects worldwide.
-
B.
Architekton
Architekton is an Arizona-based architecture firm known for contemporary, context-sensitive public and cultural projects.
-
C.
Ericson Core
Ericson Core is an American cinematographer and film director known for his work on action-driven films such as "The Fast and the Furious" and the 2015 remake of "Point Break."
-
D.
360 Architecture
360 Architecture was a Kansas City–based architectural firm known for designing major sports venues and large-scale entertainment facilities, including MetLife Stadium.
-
E.
CoRE Building
The CoRE Building is a major academic and research facility on Rutgers University's Busch Campus, housing computer science and engineering departments, labs, and offices.
- F. None of above. chosen
Statements (47)
| Predicate | Object |
|---|---|
| instanceOf |
IBM POWER architecture generation
ⓘ
RISC architecture ⓘ microprocessor architecture ⓘ |
| alsoKnownAs | POWER1 architecture NERFINISHED ⓘ |
| ancestorOf |
POWER3 architecture
NERFINISHED
ⓘ
POWER4 architecture NERFINISHED ⓘ modern IBM POWER processors ⓘ |
| basedOn |
IBM 801 project
NERFINISHED
ⓘ
IBM America Project ⓘ |
| commercializationEra | early 1990s ⓘ |
| designedFor | high-performance UNIX systems ⓘ |
| designGoal |
high floating-point performance
ⓘ
scalability for servers and workstations ⓘ |
| developer | IBM ⓘ |
| endianSupport | big-endian ⓘ |
| hasFeature |
branch processing unit
ⓘ
fixed-length instructions ⓘ load-store architecture ⓘ pipelined execution units ⓘ register-to-register operations ⓘ separate integer and floating-point units ⓘ |
| hasRegisterType |
condition register
ⓘ
count register ⓘ floating-point registers ⓘ general-purpose registers ⓘ link register ⓘ |
| influenced |
PowerPC instruction set architecture
NERFINISHED
ⓘ
later POWER2 design ⓘ |
| instructionSetType | reduced instruction set computing ⓘ |
| introducedBy | IBM RS/6000 workstations NERFINISHED ⓘ |
| introducedInProductLine | IBM RS/6000 servers NERFINISHED ⓘ |
| marketedFor |
enterprise servers
ⓘ
technical workstations ⓘ |
| partOfFamily | IBM POWER architecture family NERFINISHED ⓘ |
| primaryVendor | IBM NERFINISHED ⓘ |
| runsOperatingSystem | AIX NERFINISHED ⓘ |
| successor |
POWER Architecture, second generation
NERFINISHED
ⓘ
PowerPC architecture NERFINISHED ⓘ |
| supports |
branch prediction
ⓘ
floating-point operations ⓘ integer operations ⓘ out-of-order execution (at implementation level in POWER1) ⓘ superscalar execution ⓘ |
| usedIn |
IBM POWER1 microprocessor
NERFINISHED
ⓘ
IBM POWER1+ microprocessor NERFINISHED ⓘ early IBM RS/6000 models ⓘ |
| wordSize | 32-bit ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: POWER Architecture, first generation Description of subject: POWER Architecture, first generation refers to IBM’s original POWER1 RISC microprocessor design that formed the basis for the later POWER and PowerPC processor families.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.