Power ISA
E41463
Power ISA is IBM's modern 64-bit RISC instruction set architecture used in high-performance servers, embedded systems, and supercomputers, evolving from the earlier PowerPC architecture.
All labels observed (4)
| Label | Occurrences |
|---|---|
| Power ISA canonical | 2 |
| POWER ISA | 1 |
| Power ISA documentation set | 1 |
| open Power ISA | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T321871 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: Power ISA Context triple: [PowerPC, successor, Power ISA]
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A.
Icestorm
Icestorm is the energy-efficient, low-power CPU core microarchitecture used for the efficiency cores in Apple's M1 system-on-a-chip.
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B.
MIPS
MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.
-
C.
N Reactor
N Reactor was a dual-purpose plutonium production and power-generating nuclear reactor at the Hanford Site in Washington, notable for its graphite-moderated, water-cooled design and role in the U.S. Cold War weapons program.
-
D.
B Reactor
B Reactor is the world’s first full-scale plutonium production reactor, built during the Manhattan Project at the Hanford Site in Washington State.
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E.
Pixel
Pixel is Google's flagship line of Android smartphones known for their clean software experience and advanced camera capabilities.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: Power ISA Target entity description: Power ISA is IBM's modern 64-bit RISC instruction set architecture used in high-performance servers, embedded systems, and supercomputers, evolving from the earlier PowerPC architecture.
-
A.
Icestorm
Icestorm is the energy-efficient, low-power CPU core microarchitecture used for the efficiency cores in Apple's M1 system-on-a-chip.
-
B.
MIPS
MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.
-
C.
N Reactor
N Reactor was a dual-purpose plutonium production and power-generating nuclear reactor at the Hanford Site in Washington, notable for its graphite-moderated, water-cooled design and role in the U.S. Cold War weapons program.
-
D.
B Reactor
B Reactor is the world’s first full-scale plutonium production reactor, built during the Manhattan Project at the Hanford Site in Washington State.
-
E.
Pixel
Pixel is Google's flagship line of Android smartphones known for their clean software experience and advanced camera capabilities.
- F. None of above. chosen
Statements (50)
| Predicate | Object |
|---|---|
| instanceOf |
64-bit instruction set architecture
ⓘ
instruction set architecture ⓘ reduced instruction set computer architecture ⓘ |
| architectureFamily | RISC ⓘ |
| basedOn | PowerPC ⓘ |
| bitWidth | 64-bit ⓘ |
| designedFor |
embedded and real-time applications
ⓘ
enterprise servers ⓘ high performance computing ⓘ |
| developer | IBM ⓘ |
| family |
IBM RS/6000 systems
ⓘ
surface form:
IBM POWER architecture
|
| hasFeature |
atomic memory operations
ⓘ
branch prediction support ⓘ cache management instructions ⓘ condition register ⓘ count register ⓘ cryptographic extensions ⓘ endianness control instructions ⓘ hardware-assisted virtualization ⓘ hypervisor mode ⓘ link register ⓘ memory management unit support ⓘ performance monitoring facilities ⓘ privileged and problem state separation ⓘ segmented and paged memory model ⓘ special-purpose registers ⓘ vector multimedia extensions ⓘ vector-scalar floating-point unit ⓘ |
| isPartOf | OpenPOWER ecosystem ⓘ |
| predecessor | PowerPC ⓘ |
| standardizedBy |
OpenPOWER ecosystem
ⓘ
surface form:
OpenPOWER Foundation
|
| supports |
64-bit address space
ⓘ
64-bit general-purpose registers ⓘ SIMD instructions ⓘ big-endian mode ⓘ floating-point operations ⓘ hardware multithreading ⓘ little-endian mode ⓘ vector instructions ⓘ virtualization features ⓘ |
| usedBy |
IBM Power Systems
ⓘ
IBM Power Systems ⓘ
surface form:
IBM Power servers
IBM System z ⓘ
surface form:
IBM mainframes
OpenPOWER partners ⓘ |
| usedIn |
embedded systems
ⓘ
high-performance servers ⓘ networking equipment ⓘ storage systems ⓘ supercomputers ⓘ workstations ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: Power ISA Description of subject: Power ISA is IBM's modern 64-bit RISC instruction set architecture used in high-performance servers, embedded systems, and supercomputers, evolving from the earlier PowerPC architecture.
Referenced by (5)
Full triples — surface form annotated when it differs from this entity's canonical label.