R2000
E724104
The R2000 is a 32-bit MIPS RISC microprocessor that became one of the earliest and most influential commercial implementations of the MIPS architecture in the mid-1980s.
Statements (46)
| Predicate | Object |
|---|---|
| instanceOf |
MIPS microprocessor
ⓘ
microprocessor ⓘ |
| addressSpace | 32-bit address space ⓘ |
| architecture | MIPS NERFINISHED ⓘ |
| bitWidth | 32-bit ⓘ |
| category | early RISC microprocessor ⓘ |
| commercialStatus | commercial implementation ⓘ |
| companyTypeOfDeveloper | fabless semiconductor company ⓘ |
| coprocessorInterface | MIPS coprocessor interface NERFINISHED ⓘ |
| countryOfOrigin |
United States of America
ⓘ
surface form:
United States
|
| dataPathWidth | 32-bit data path ⓘ |
| designedFor | high performance per transistor ⓘ |
| designGoal |
high clock frequency for its time
ⓘ
simplicity of instruction set ⓘ |
| designPhilosophy | RISC NERFINISHED ⓘ |
| developer | MIPS Computer Systems NERFINISHED ⓘ |
| floatingPointCoprocessor | R2010 ⓘ |
| floatingPointSupport | via external coprocessor ⓘ |
| hasComponent |
coprocessor interface
ⓘ
integer execution unit ⓘ register file ⓘ |
| implementationTechnology | CMOS NERFINISHED ⓘ |
| influenced |
RISC microprocessor design practices
ⓘ
later MIPS processor designs ⓘ |
| instructionSetArchitecture | MIPS I NERFINISHED ⓘ |
| marketAvailability | mid-1980s ⓘ |
| notableFor |
clean load-store RISC design
ⓘ
influencing academic and commercial RISC designs ⓘ |
| pipelineType | pipelined ⓘ |
| registerFileType | general-purpose register file ⓘ |
| roleInHistory |
influential early MIPS implementation
ⓘ
one of the earliest commercial implementations of the MIPS architecture ⓘ |
| successor | R3000 ⓘ |
| supports |
branch and jump instructions
ⓘ
coprocessor instructions ⓘ fixed-length instructions ⓘ hardwired control ⓘ integer arithmetic operations ⓘ load-store architecture ⓘ logical operations ⓘ virtual memory (with external TLB support) ⓘ |
| usedIn |
embedded systems
ⓘ
servers ⓘ workstations ⓘ |
| uses | separate instruction and data caches (in typical systems) ⓘ |
| wordSize | 32 bits ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.