POWER instruction set architecture

E216082
RISC architecture instruction set architecture

The POWER instruction set architecture is a reduced instruction set computing (RISC) architecture originally developed by IBM for high-performance servers and workstations, forming the basis for later PowerPC and Power Architecture designs.

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All labels observed (4)

Label Occurrences
POWER ISA 3
POWER architecture 1
POWER instruction set architecture canonical 1

Statements (41)

Predicate Object
instanceOf RISC architecture ⓘ
instruction set architecture ⓘ
architectureFamily POWER ⓘ
category IBM instruction set architectures ⓘ
RISC instruction set architectures ⓘ
computingParadigm reduced instruction set computing ⓘ
countryOfOrigin United States of America ⓘ
surface form: United States
designedFor IBM RS/6000 systems ⓘ
surface form: IBM RS/6000 servers

IBM RS/6000 systems ⓘ
surface form: IBM RS/6000 workstations
developer IBM ⓘ
formsBasisOf Power Architecture ⓘ
PowerPC ⓘ
hasAbbreviation POWER instruction set architecture self-linksurface differs ⓘ
surface form: POWER ISA
hasDesignGoal high performance ⓘ
scalability ⓘ
support for multiprocessing ⓘ
hasFeature condition register ⓘ
fixed-length instructions ⓘ
large register file ⓘ
separate integer and floating-point registers ⓘ
support for out-of-order execution in implementations ⓘ
support for pipelining ⓘ
influenced Power Architecture ⓘ
surface form: Power Architecture specification

PowerPC ⓘ
surface form: PowerPC instruction set architecture
introducedBy IBM RS/6000 systems ⓘ
surface form: IBM RS/6000 line
marketedBy IBM ⓘ
relatedTo Power Architecture ⓘ
PowerPC ⓘ
surface form: PowerPC architecture
successor POWER instruction set architecture self-linksurface differs ⓘ
surface form: Power Architecture ISA

PowerPC ⓘ
surface form: PowerPC instruction set architecture
supports 32-bit implementation ⓘ
branch instructions ⓘ
floating-point operations ⓘ
integer operations ⓘ
load-store architecture ⓘ
superscalar implementation ⓘ
usedFor high-performance servers ⓘ
workstations ⓘ
usedIn IBM POWER instruction set ⓘ
surface form: IBM POWER1 processors

IBM POWER2 processors ⓘ
IBM RS/6000 systems ⓘ

Referenced by (6)

Full triples — surface form annotated when it differs from this entity's canonical label.

Power Architecture → basedOn → POWER instruction set architecture ⓘ
POWER instruction set architecture → successor → POWER instruction set architecture self-linksurface differs ⓘ
this entity surface form: Power Architecture ISA
POWER instruction set architecture → hasAbbreviation → POWER instruction set architecture self-linksurface differs ⓘ
this entity surface form: POWER ISA
IBM Power Systems → architecture → POWER instruction set architecture ⓘ
this entity surface form: POWER architecture
POWER2 → instructionSetArchitecture → POWER instruction set architecture ⓘ
this entity surface form: POWER ISA
RAD6000 → instructionSetArchitecture → POWER instruction set architecture ⓘ
this entity surface form: POWER ISA