IBM POWER instruction set
E758593
The IBM POWER instruction set is a RISC-based computer architecture developed by IBM for its high-performance POWER processors used in servers, workstations, and supercomputers.
All labels observed (5)
| Label | Occurrences |
|---|---|
| IBM POWER instruction set canonical | 1 |
| IBM POWER processors | 1 |
| IBM POWER1 processors | 1 |
| IBM Power ISA | 1 |
| IBM Power architecture | 1 |
Statements (37)
| Predicate | Object |
|---|---|
| instanceOf |
RISC architecture
ⓘ
instruction set architecture ⓘ |
| architectureFamily | POWER architecture NERFINISHED ⓘ |
| category |
IBM microprocessor technologies
ⓘ
RISC instruction set architectures ⓘ |
| countryOfOrigin |
United States of America
ⓘ
surface form:
United States
|
| designGoal |
high performance
ⓘ
reduced instruction set computing ⓘ |
| developer | IBM ⓘ |
| influenced |
Power ISA specification
NERFINISHED
ⓘ
PowerPC architecture NERFINISHED ⓘ |
| marketedFor |
enterprise servers
ⓘ
high-performance computing ⓘ technical workstations ⓘ |
| relatedTo |
Power ISA
NERFINISHED
ⓘ
PowerPC instruction set ⓘ |
| supports |
branch instructions
ⓘ
cache control instructions ⓘ condition register ⓘ fixed-point registers ⓘ floating-point operations ⓘ floating-point registers ⓘ integer operations ⓘ load-store architecture ⓘ memory management instructions ⓘ pipelined implementations ⓘ privileged instructions ⓘ superscalar implementations ⓘ |
| usedBy |
IBM POWER1 processors
NERFINISHED
ⓘ
IBM POWER2 processors NERFINISHED ⓘ IBM RS/6000 systems NERFINISHED ⓘ |
| usedIn |
IBM POWER processors
NERFINISHED
ⓘ
servers ⓘ supercomputers ⓘ workstations ⓘ |
| wordSize |
32-bit
ⓘ
64-bit ⓘ |
Referenced by (5)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
IBM Power ISA
this entity surface form:
IBM POWER processors
this entity surface form:
IBM POWER1 processors
this entity surface form:
IBM Power architecture