IBM POWER instruction set

E758593

The IBM POWER instruction set is a RISC-based computer architecture developed by IBM for its high-performance POWER processors used in servers, workstations, and supercomputers.

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All labels observed (5)

Statements (37)

Predicate Object
instanceOf RISC architecture
instruction set architecture
architectureFamily POWER architecture NERFINISHED
category IBM microprocessor technologies
RISC instruction set architectures
countryOfOrigin United States of America
surface form: United States
designGoal high performance
reduced instruction set computing
developer IBM
influenced Power ISA specification NERFINISHED
PowerPC architecture NERFINISHED
marketedFor enterprise servers
high-performance computing
technical workstations
relatedTo Power ISA NERFINISHED
PowerPC instruction set
supports branch instructions
cache control instructions
condition register
fixed-point registers
floating-point operations
floating-point registers
integer operations
load-store architecture
memory management instructions
pipelined implementations
privileged instructions
superscalar implementations
usedBy IBM POWER1 processors NERFINISHED
IBM POWER2 processors NERFINISHED
IBM RS/6000 systems NERFINISHED
usedIn IBM POWER processors NERFINISHED
servers
supercomputers
workstations
wordSize 32-bit
64-bit

Referenced by (5)

Full triples — surface form annotated when it differs from this entity's canonical label.

POWER3 supports IBM POWER instruction set
OpenPOWER ecosystem basedOn IBM POWER instruction set
this entity surface form: IBM Power ISA
OpenPOWER ecosystem relatedTo IBM POWER instruction set
this entity surface form: IBM POWER processors
POWER instruction set architecture usedIn IBM POWER instruction set
this entity surface form: IBM POWER1 processors
Red Hat CoreOS supports IBM POWER instruction set
this entity surface form: IBM Power architecture