instructionSetType
P9897
predicate
Indicates the type or category of an instruction set associated with a processor or computing architecture.
All labels observed (12)
| Label | Occurrences |
|---|---|
| supportsInstructionSet | 158 |
| instructionSet | 77 |
| instructionSetType canonical | 37 |
| hasInstructionType | 17 |
| instructionType | 8 |
| opcodeSet | 7 |
| containsInstructionType | 6 |
| includesInstructionType | 4 |
| instructionSetDesign | 4 |
| instructionSetStyle | 3 |
| cpuInstructionSet | 1 |
| instructionSetArchitectureType | 1 |
Description generation (PDg)
The one-sentence description above was generated by prompting gpt-5.1 with the predicate name and this instruction.
Instruction
Given a predicate that represents a relationship or action between entities, generate a one-sentence description explaining its meaning. # Instructions Focus on describing the relationship, not the entities themselves. # Response Format Begin the description with \' Indicates...\'
Input
Predicate: instructionSetType
Generated description
Indicates the type or category of an instruction set associated with a processor or computing architecture.
Sample triples (323)
| Subject | Object |
|---|---|
| Genoa | x86-64 via predicate surface "instructionSet" ⓘ |
| Ice Lake | x86-64 via predicate surface "supportsInstructionSet" ⓘ |
| Ice Lake | Intel 64 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| NS32032 | orthogonal instruction set via predicate surface "instructionSet" ⓘ |
|
Zilog Z8000 microprocessor
surface form:
Zilog Z8000
|
orthogonal ⓘ |
| MCS-4 | CISC ⓘ |
| Intel 4040 | CISC ⓘ |
| IBM 704 | binary instruction set via predicate surface "instructionSet" ⓘ |
|
R3
surface form:
R3 (PDP-11 register)
|
PDP-11 instruction set via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Amber Lake-Y | x86-64 via predicate surface "supportsInstructionSet" ⓘ |
| Virtual Address eXtension | complex instruction set computing ⓘ |
| Intel Core m3-7Y30 | 64-bit via predicate surface "instructionSet" ⓘ |
| Intel Core i5-7Y57 | SSE4.1 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core i5-7Y57 | SSE4.2 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core i5-7Y57 | AVX2 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core i7-7Y75 | x86-64 via predicate surface "instructionSet" ⓘ |
| Intel Core i5-8200Y | x86 via predicate surface "instructionSet" ⓘ |
| McKinley | IA-64 ISA via predicate surface "instructionSet" NERFINISHED ⓘ |
| Poulson | IA-64 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Kittson | IA-64 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Intel Core i7-8500Y | SSE4.1 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core i7-8500Y | SSE4.2 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core i7-8500Y | AVX2 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core i7-8500Y | Intel 64 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Merced | IA-64 instruction set architecture via predicate surface "instructionSet" NERFINISHED ⓘ |
| R4000 | MIPS III ISA via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| SH4 | fixed-length 16-bit instructions via predicate surface "instructionSet" ⓘ |
| Castlemont High School | in-person classroom instruction via predicate surface "hasInstructionType" ⓘ |
| MIPS III | RISC NERFINISHED ⓘ |
| MIPS IV | RISC ⓘ |
| A11 Bionic | ARMv8-A via predicate surface "instructionSet" NERFINISHED ⓘ |
| ARM GCC | ARM Thumb via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| ARM GCC | ARM Thumb-2 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Sun-4 architecture | RISC ⓘ |
| IBM High Level Assembler | z/Architecture instruction set via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| POWER Architecture, first generation | reduced instruction set computing ⓘ |
|
Motorola 56001 DSP
surface form:
Motorola 56001
|
DSP-oriented instruction set ⓘ |
| Intel-based Mac | Intel SSE3 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel-based Mac | Intel 64 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| IBM Gekko | PowerPC ISA via predicate surface "instructionSet" NERFINISHED ⓘ |
| Gekko | PowerPC ISA via predicate surface "instructionSet" NERFINISHED ⓘ |
|
Ampere Altra server processors
surface form:
Ampere Altra
|
ARMv8.2-A with server extensions via predicate surface "instructionSet" ⓘ |
| VAX minicomputer | CISC ⓘ |
| Alpha AXP | RISC via predicate surface "instructionSetArchitectureType" NERFINISHED ⓘ |
| Data General MV series | Eclipse MV instruction set via predicate surface "instructionSet" ⓘ |
| Nova 16-bit minicomputers | accumulator-based architecture via predicate surface "instructionSetStyle" ⓘ |
|
Eclipse MV/8000 32-bit architecture
surface form:
Eclipse MV/8000
|
CISC ⓘ |
| DECsystem-20 | PDP-10 instruction set via predicate surface "instructionSet" ⓘ |
| KA10 | CISC via predicate surface "instructionType" ⓘ |
| MIPS R2000 | reduced instruction set computing ⓘ |