MIPS IV
E727374
MIPS IV is a 64-bit RISC instruction set architecture in the MIPS family, designed to enhance performance and support advanced computing features over its predecessors.
All labels observed (1)
| Label | Occurrences |
|---|---|
| MIPS IV canonical | 1 |
Statements (48)
| Predicate | Object |
|---|---|
| instanceOf |
MIPS architecture revision
ⓘ
instruction set architecture ⓘ |
| architectureFamily | MIPS NERFINISHED ⓘ |
| backwardCompatibleWith |
MIPS I
NERFINISHED
ⓘ
MIPS II NERFINISHED ⓘ MIPS III NERFINISHED ⓘ |
| bitWidth | 64-bit ⓘ |
| category |
64-bit ISA
ⓘ
RISC ISA ⓘ |
| designer | MIPS Technologies NERFINISHED ⓘ |
| designGoal |
higher performance than MIPS III
ⓘ
improved floating-point performance ⓘ improved support for 64-bit computing ⓘ support for advanced compiler optimizations ⓘ |
| instructionSetType | RISC ⓘ |
| introducedFeature |
conditional move (MOVN/MOVZ) for integers
ⓘ
enhanced floating-point compare and branch support ⓘ floating-point conditional move (C.cond.fmt + MOVT/MOVF style) ⓘ prefetch (PREF) instruction ⓘ trap-on-condition (TEQ, TNE, TGE, TLT variants) refinements ⓘ |
| pipelineModel | load/store architecture ⓘ |
| predecessor | MIPS III NERFINISHED ⓘ |
| registerCount |
32 floating-point registers
ⓘ
32 general-purpose integer registers ⓘ |
| standardizedBy | MIPS Technologies architecture manuals ⓘ |
| successor | MIPS V NERFINISHED ⓘ |
| supports |
32-bit integer operations
ⓘ
64-bit general-purpose registers ⓘ 64-bit integer operations ⓘ 64-bit load and store instructions ⓘ 64-bit virtual address space (implementation-dependent limits) ⓘ IEEE 754 floating-point NERFINISHED ⓘ big-endian implementations ⓘ conditional move instructions ⓘ double-precision floating-point ⓘ enhanced floating-point compare instructions ⓘ floating-point conditional move ⓘ fused multiply-add style operations (via paired instructions) ⓘ improved branch instructions ⓘ little-endian implementations ⓘ prefetch instructions ⓘ single-precision floating-point ⓘ trap-on-condition instructions ⓘ |
| usedIn |
MIPS R10000
NERFINISHED
ⓘ
MIPS R12000 NERFINISHED ⓘ MIPS R14000 NERFINISHED ⓘ SGI high-end workstations ⓘ SGI servers ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.