Triple
T31583325
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Alpha AXP |
E805881
|
entity |
| Predicate | instructionSetArchitectureType |
P9897
|
FINISHED |
| Object | RISC |
—
|
NE NERFINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: RISC | Statement: [Alpha AXP, instructionSetArchitectureType, RISC]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: instructionSetArchitectureType Context triple: [Alpha AXP, instructionSetArchitectureType, RISC]
-
A.
instructionSetType
chosen
Indicates the type or category of an instruction set associated with a processor or computing architecture.
-
B.
cpuArchitecture
Indicates the type of processor instruction set or hardware architecture that a computing system or component is designed to run on.
-
C.
instructionSetSize
Indicates the size or number of instructions defined in an instruction set.
-
D.
CPUType
Indicates the specific model or category of processor architecture that an entity uses or is associated with.
-
E.
hasInstructionSet
Indicates that one entity (typically a processor or system) is defined as using or supporting a particular instruction set.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69f348d3a86c8190a3e5e539a4dd125f |
completed | April 30, 2026, 12:19 p.m. |
| NER | Named-entity recognition | batch_69f6a80b14308190aa4cb44b8c730611 |
completed | May 3, 2026, 1:42 a.m. |
| PD | Predicate disambiguation | batch_69f6a75656e081908739ed9e2f600e42 |
completed | May 3, 2026, 1:39 a.m. |
Created at: April 30, 2026, 10:24 p.m.