IEEE 1149.6
E9591
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
Aliases (5)
Statements (49)
| Predicate | Object |
|---|---|
| instanceOf |
IEEE standard
→
JTAG extension → boundary-scan test standard → |
| abbreviationOf |
IEEE Standard 1149.6
→
|
| addsCapability |
testing of AC-coupled nets not testable by IEEE 1149.1 alone
→
testing of differential signaling nets not testable by IEEE 1149.1 alone → |
| appliesTo |
backplane interconnects
→
chip-to-chip differential links → high-speed serial interfaces → multi-gigabit transceiver links → |
| category |
design-for-test standard
→
testability standard → |
| defines |
AC test cells for boundary scan
→
additional boundary-scan cell types → stimulus and capture techniques for high-speed nets → test methods for AC-coupled nets → test methods for differential nets → test procedures for detecting missing AC coupling capacitors → test procedures for detecting opens and shorts on AC-coupled nets → test procedures for detecting resistive faults on high-speed nets → test procedures for detecting shorts between differential pairs → test procedures for detecting swapped differential pairs → test procedures for detecting wrong-value AC coupling capacitors → test receiver structures for AC-coupled signals → test transmitter structures for AC-coupled signals → |
| extends |
IEEE 1149.1
→
|
| focusesOn |
board-level interconnect test rather than functional test
→
|
| fullName |
IEEE Standard for Boundary-Scan Testing of Advanced Digital Networks
→
|
| goal |
enable structural test of AC-coupled and differential nets via JTAG
→
improve test coverage for high-speed interconnects → |
| isCompatibleWith |
IEEE 1149.1 test access port (TAP)
→
|
| isPartOf |
IEEE 1149 family of standards
→
|
| isUsedFor |
board-level production test
→
design-for-test (DFT) of high-speed digital systems → in-system test of high-speed interfaces → structural testing of printed circuit board interconnects → |
| publishedBy |
Institute of Electrical and Electronics Engineers
→
|
| relatedTo |
IEEE 1149.10
→
IEEE 1149.4 → IEEE 1149.7 → |
| requires |
IEEE 1149.1 compliant TAP controller
→
|
| supportsTestingOf |
AC-coupled interconnects
→
differential interconnects → gigabit serial links → high-speed digital interconnects → low-voltage differential signaling (LVDS) nets → |
| uses |
boundary-scan architecture
→
digital stimulus patterns adapted for AC coupling → edge-based detection for AC-coupled signals → |
Referenced by (9)
| Subject (surface form when different) | Predicate |
|---|---|
|
IEEE 1149 family of standards
→
IEEE 1149 family of standards ("IEEE 1149.8.1") → IEEE 1149 family of standards ("IEEE 1149.6 AC-coupled interconnect test standard") → |
includes |
|
IEEE 1149.1 JTAG boundary-scan standard
→
IEEE 1149.1 JTAG boundary-scan standard ("IEEE 1149.4") → |
relatedStandard |
|
IEEE 1149.7
→
IEEE 1532 → |
relatedTo |
|
IEEE 1149.6
("IEEE Standard 1149.6")
→
|
abbreviationOf |
|
IEEE 1149.6
("IEEE Standard for Boundary-Scan Testing of Advanced Digital Networks")
→
|
fullName |