IEEE 1149.4
E55111
IEEE 1149.4 is a mixed-signal test bus standard that extends JTAG boundary-scan techniques to support testing and diagnosis of analog and mixed-signal circuits on printed circuit boards.
All labels observed (2)
| Label | Occurrences |
|---|---|
| IEEE 1149.4 canonical | 4 |
| IEEE 1149.4 mixed-signal test bus standard | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T415913 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: IEEE 1149.4 Context triple: [IEEE 1149.6, relatedTo, IEEE 1149.4]
-
A.
IEEE 1149.7
IEEE 1149.7 is a compact, enhanced version of the JTAG test and debug standard that reduces pin count and power while adding advanced debug and trace capabilities for modern integrated circuits.
-
B.
IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
-
C.
IEEE 1149 family of standards
The IEEE 1149 family of standards is a set of Joint Test Action Group (JTAG) boundary-scan specifications that define methods for testing, debugging, and accessing digital integrated circuits and boards.
-
D.
IEEE 1149.1 JTAG boundary‑scan standard
The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
-
E.
IEEE 1532
IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: IEEE 1149.4 Target entity description: IEEE 1149.4 is a mixed-signal test bus standard that extends JTAG boundary-scan techniques to support testing and diagnosis of analog and mixed-signal circuits on printed circuit boards.
-
A.
IEEE 1149.7
IEEE 1149.7 is a compact, enhanced version of the JTAG test and debug standard that reduces pin count and power while adding advanced debug and trace capabilities for modern integrated circuits.
-
B.
IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
-
C.
IEEE 1149 family of standards
The IEEE 1149 family of standards is a set of Joint Test Action Group (JTAG) boundary-scan specifications that define methods for testing, debugging, and accessing digital integrated circuits and boards.
-
D.
IEEE 1149.1 JTAG boundary‑scan standard
The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
-
E.
IEEE 1532
IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
- F. None of above. chosen
Statements (42)
| Predicate | Object |
|---|---|
| instanceOf |
IEEE standard
ⓘ
boundary-scan standard ⓘ mixed-signal test bus standard ⓘ |
| appliesTo | printed circuit boards ⓘ |
| benefits |
fault isolation in analog sections of PCBs
ⓘ
non-intrusive analog measurements on boards ⓘ |
| compatibleWith |
IEEE 1149.1 JTAG boundary‑scan standard
ⓘ
surface form:
IEEE 1149.1 boundary-scan chains
|
| defines |
analog boundary modules
ⓘ
analog test access port ⓘ analog test bus ⓘ test bus interface circuits ⓘ |
| domain |
design for testability
ⓘ
electronic test ⓘ mixed-signal integrated circuits ⓘ |
| enables |
board-level analog test access
ⓘ
in-system test of analog nodes ⓘ measurement of analog signals via digital test infrastructure ⓘ |
| extends |
IEEE 1149 family of standards
ⓘ
surface form:
IEEE 1149.1
|
| focusesOn |
on-board analog signal routing for test
ⓘ
standardized analog test access structures ⓘ |
| goal |
improve testability of analog and mixed-signal boards
ⓘ
reduce need for physical test access to analog nodes ⓘ |
| hasAbbreviation | 1149.4 ⓘ |
| hasFeature |
analog boundary-scan cells
ⓘ
programmable connection of pins to analog test bus ⓘ two-wire analog test bus ⓘ |
| hasType | mixed-signal extension of JTAG ⓘ |
| partOf |
IEEE 1149 family of standards
ⓘ
surface form:
IEEE 1149 family of test standards
|
| relatedTo |
IEEE 1149.1 JTAG boundary‑scan standard
ⓘ
surface form:
JTAG
boundary-scan architecture ⓘ |
| requires | dedicated analog test pins on compliant devices ⓘ |
| standardizedBy |
Institute of Electrical and Electronics Engineers
ⓘ
surface form:
IEEE
Institute of Electrical and Electronics Engineers ⓘ |
| supports |
diagnosis of analog circuits
ⓘ
diagnosis of mixed-signal circuits ⓘ testing of analog circuits ⓘ testing of mixed-signal circuits ⓘ |
| usedBy |
automatic test equipment
ⓘ
board test systems ⓘ |
| usedIn |
diagnostic test of fielded systems
ⓘ
production test of electronic assemblies ⓘ |
| usesTechnique | boundary-scan ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: IEEE 1149.4 Description of subject: IEEE 1149.4 is a mixed-signal test bus standard that extends JTAG boundary-scan techniques to support testing and diagnosis of analog and mixed-signal circuits on printed circuit boards.
Referenced by (5)
Full triples — surface form annotated when it differs from this entity's canonical label.