IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture
E280701
IEEE 1149.10 is a JTAG-related IEEE standard that defines a high-speed test access and boundary-scan architecture for efficient testing and debugging of complex digital integrated circuits and systems.
All labels observed (1)
| Label | Occurrences |
|---|---|
| IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture canonical | 2 |
How this entity was disambiguated
This entity first appeared as the object of triple T2530968 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture Context triple: [IEEE 1149.10, fullName, IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture]
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A.
IEEE 1149.1 JTAG boundary‑scan standard
The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
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B.
IEEE 1149 family of standards
The IEEE 1149 family of standards is a set of Joint Test Action Group (JTAG) boundary-scan specifications that define methods for testing, debugging, and accessing digital integrated circuits and boards.
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C.
IEEE 1149.7
IEEE 1149.7 is a compact, enhanced version of the JTAG test and debug standard that reduces pin count and power while adding advanced debug and trace capabilities for modern integrated circuits.
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D.
IEEE 1149.4
IEEE 1149.4 is a mixed-signal test bus standard that extends JTAG boundary-scan techniques to support testing and diagnosis of analog and mixed-signal circuits on printed circuit boards.
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E.
IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture Target entity description: IEEE 1149.10 is a JTAG-related IEEE standard that defines a high-speed test access and boundary-scan architecture for efficient testing and debugging of complex digital integrated circuits and systems.
-
A.
IEEE 1149.1 JTAG boundary‑scan standard
The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
-
B.
IEEE 1149 family of standards
The IEEE 1149 family of standards is a set of Joint Test Action Group (JTAG) boundary-scan specifications that define methods for testing, debugging, and accessing digital integrated circuits and boards.
-
C.
IEEE 1149.7
IEEE 1149.7 is a compact, enhanced version of the JTAG test and debug standard that reduces pin count and power while adding advanced debug and trace capabilities for modern integrated circuits.
-
D.
IEEE 1149.4
IEEE 1149.4 is a mixed-signal test bus standard that extends JTAG boundary-scan techniques to support testing and diagnosis of analog and mixed-signal circuits on printed circuit boards.
-
E.
IEEE 1149.6
IEEE 1149.6 is a boundary-scan test standard that extends JTAG to support structural testing of high-speed AC-coupled and differential digital interconnects on printed circuit boards.
- F. None of above. chosen
Statements (38)
| Predicate | Object |
|---|---|
| instanceOf |
IEEE standard
ⓘ
JTAG-related standard ⓘ |
| appliesTo |
complex digital systems
ⓘ
digital integrated circuits ⓘ |
| category |
digital test interface standard
ⓘ
electronic testing standard ⓘ |
| conformsToFamily | boundary-scan architecture ⓘ |
| defines |
high-speed boundary-scan architecture
ⓘ
high-speed test access port architecture ⓘ |
| domain |
design for testability
ⓘ
electronic design automation ⓘ hardware debugging ⓘ |
| focusesOn |
efficient boundary-scan operations
ⓘ
high-speed serial test access ⓘ |
| fullName | IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture self-linksurface differs ⓘ |
| goal |
enable high-speed access to embedded test resources
ⓘ
improve test efficiency ⓘ reduce test time ⓘ |
| hasFeature |
boundary-scan support
ⓘ
high-speed test data transport ⓘ support for complex system debug ⓘ test access port definition ⓘ |
| improvesUpon | limitations of low-speed JTAG test access ⓘ |
| partOfSeries |
IEEE 1149 family of standards
ⓘ
surface form:
IEEE 1149 boundary-scan standards family
|
| publishedBy |
IEEE Standards Association
ⓘ
Institute of Electrical and Electronics Engineers ⓘ |
| relatedTo |
IEEE 1149 family of standards
ⓘ
surface form:
IEEE 1149.1
IEEE 1149.1 JTAG boundary‑scan standard ⓘ
surface form:
JTAG
|
| standardNumber | 1149.10 ⓘ |
| standardType | test access architecture standard ⓘ |
| supports | embedded test and debug infrastructure ⓘ |
| useCase |
board-level test
ⓘ
debugging of complex digital integrated circuits ⓘ system-level test ⓘ testing of complex digital integrated circuits ⓘ |
| usedBy |
semiconductor manufacturers
ⓘ
system integrators ⓘ test equipment vendors ⓘ |
How these facts were elicited
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You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: IEEE Standard for High-Speed Test Access Port and Boundary-Scan Architecture Description of subject: IEEE 1149.10 is a JTAG-related IEEE standard that defines a high-speed test access and boundary-scan architecture for efficient testing and debugging of complex digital integrated circuits and systems.
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.