B (bit-manipulation extension)
E193750
B (bit-manipulation extension) is a RISC-V ISA extension that adds specialized instructions to efficiently perform common bit-level operations such as shifts, rotates, and bitfield manipulation.
All labels observed (5)
| Label | Occurrences |
|---|---|
| B (bit-manipulation extension) canonical | 1 |
| RISC-V B extension | 1 |
| RISC-V Bit-Manipulation extension | 1 |
| Zba (address generation bit-manipulation) | 1 |
| Zbb (basic bit-manipulation) | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T1717915 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: B (bit-manipulation extension) Context triple: [RISC-V, hasExtension, B (bit-manipulation extension)]
-
A.
B programming language
The B programming language is an early, minimalist high-level language developed at Bell Labs that directly influenced the design of the C programming language.
-
B.
BitC
BitC is a systems programming language designed for safety, low-level control, and formal verification, drawing on ideas from Modula-3 and capability-based security.
-
C.
SSE2
SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
-
D.
MMIX
MMIX is a 64-bit RISC-style hypothetical computer architecture designed by Donald Knuth as the pedagogical machine for later volumes of *The Art of Computer Programming*.
-
E.
MIPS
MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: B (bit-manipulation extension) Target entity description: B (bit-manipulation extension) is a RISC-V ISA extension that adds specialized instructions to efficiently perform common bit-level operations such as shifts, rotates, and bitfield manipulation.
-
A.
B programming language
The B programming language is an early, minimalist high-level language developed at Bell Labs that directly influenced the design of the C programming language.
-
B.
BitC
BitC is a systems programming language designed for safety, low-level control, and formal verification, drawing on ideas from Modula-3 and capability-based security.
-
C.
SSE2
SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
-
D.
MMIX
MMIX is a 64-bit RISC-style hypothetical computer architecture designed by Donald Knuth as the pedagogical machine for later volumes of *The Art of Computer Programming*.
-
E.
MIPS
MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.
- F. None of above. chosen
Statements (49)
| Predicate | Object |
|---|---|
| instanceOf |
RISC-V ISA extension
ⓘ
instruction set architecture extension ⓘ |
| addsInstructionType | bit-manipulation instructions ⓘ |
| alsoKnownAs |
B (bit-manipulation extension)
ⓘ
surface form:
RISC-V B extension
B (bit-manipulation extension) ⓘ
surface form:
RISC-V Bit-Manipulation extension
|
| appliesTo |
RISC-V
ⓘ
surface form:
RISC-V 128-bit integer ISA
RISC-V 32-bit integer ISA ⓘ RISC-V ⓘ
surface form:
RISC-V 64-bit integer ISA
|
| architecture | RISC-V ⓘ |
| compatibleWith |
RISC-V
ⓘ
surface form:
RISC-V base integer extension I
|
| designPrinciple |
maintain compatibility with base RISC-V ISA
ⓘ
provide specialized instructions for common bit-twiddling idioms ⓘ |
| domain |
computer architecture
ⓘ
instruction set design ⓘ |
| goal |
improve efficiency of bit-level operations
ⓘ
improve performance of cryptographic workloads ⓘ improve performance of data compression workloads ⓘ improve performance of graphics and signal-processing workloads ⓘ reduce instruction count for bit manipulation code sequences ⓘ |
| granularity | operates on integer registers ⓘ |
| hasSubextension |
B (bit-manipulation extension)
self-linksurface differs
ⓘ
surface form:
Zba (address generation bit-manipulation)
B (bit-manipulation extension) self-linksurface differs ⓘ
surface form:
Zbb (basic bit-manipulation)
CLMUL ⓘ
surface form:
Zbc (carry-less multiplication)
Zbe (bit-field extract) ⓘ Zbf (bit-field place) ⓘ Zbp (bit permutation) ⓘ Zbr (bit matrix operations) ⓘ Zbs (single-bit instructions) ⓘ Zbt (ternary bit-manipulation) ⓘ |
| standardizedBy | RISC-V International ⓘ |
| status | ratified RISC-V extension ⓘ |
| supportsOperation |
bit extraction
ⓘ
bit insertion ⓘ bit-level operations ⓘ bitfield manipulation ⓘ bitwise conditional operations ⓘ bitwise logical operations ⓘ bitwise permutation ⓘ count leading zeros ⓘ count trailing zeros ⓘ population count ⓘ rotates ⓘ shifts ⓘ single-bit operations ⓘ |
| typicalUseCase |
bitfield packing and unpacking
ⓘ
checksums and CRCs ⓘ cryptographic algorithms ⓘ hash functions ⓘ low-level systems programming ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: B (bit-manipulation extension) Description of subject: B (bit-manipulation extension) is a RISC-V ISA extension that adds specialized instructions to efficiently perform common bit-level operations such as shifts, rotates, and bitfield manipulation.
Referenced by (5)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
RISC-V Bit-Manipulation extension
this entity surface form:
RISC-V B extension
B (bit-manipulation extension)
→
hasSubextension
→
B (bit-manipulation extension)
self-linksurface differs
ⓘ
this entity surface form:
Zba (address generation bit-manipulation)
B (bit-manipulation extension)
→
hasSubextension
→
B (bit-manipulation extension)
self-linksurface differs
ⓘ
this entity surface form:
Zbb (basic bit-manipulation)