International Technology Roadmap for Semiconductors
E232503
The International Technology Roadmap for Semiconductors was a collaborative industry effort that forecasted and coordinated global semiconductor technology development, guiding research and manufacturing priorities for chip scaling and performance.
All labels observed (3)
| Label | Occurrences |
|---|---|
| International Technology Roadmap for Semiconductors canonical | 2 |
| ITRS | 1 |
| International Roadmap for Devices and Systems | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T2088710 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: International Technology Roadmap for Semiconductors Context triple: [Moore's law, influenced, International Technology Roadmap for Semiconductors]
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A.
IEEE International Electron Devices Meeting
The IEEE International Electron Devices Meeting is a premier annual conference where researchers and industry leaders present and discuss cutting-edge advances in semiconductor and electronic device technology.
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B.
“Cramming more components onto integrated circuits”
“Cramming more components onto integrated circuits” is the landmark 1965 article by Gordon E. Moore that introduced the observation later known as Moore’s Law, predicting the exponential growth of transistor density on integrated circuits.
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C.
IEEE Electron Device Letters
IEEE Electron Device Letters is a peer-reviewed scientific journal focusing on rapid publication of short, original research papers in the field of electron and semiconductor devices.
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D.
Washington Treaty on Intellectual Property in Respect of Integrated Circuits
The Washington Treaty on Intellectual Property in Respect of Integrated Circuits is an international agreement that establishes specific intellectual property protections for the layout designs (topographies) of integrated circuits.
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E.
IEEE 1149.1 JTAG boundary‑scan standard
The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: International Technology Roadmap for Semiconductors Target entity description: The International Technology Roadmap for Semiconductors was a collaborative industry effort that forecasted and coordinated global semiconductor technology development, guiding research and manufacturing priorities for chip scaling and performance.
-
A.
IEEE International Electron Devices Meeting
The IEEE International Electron Devices Meeting is a premier annual conference where researchers and industry leaders present and discuss cutting-edge advances in semiconductor and electronic device technology.
-
B.
“Cramming more components onto integrated circuits”
“Cramming more components onto integrated circuits” is the landmark 1965 article by Gordon E. Moore that introduced the observation later known as Moore’s Law, predicting the exponential growth of transistor density on integrated circuits.
-
C.
IEEE Electron Device Letters
IEEE Electron Device Letters is a peer-reviewed scientific journal focusing on rapid publication of short, original research papers in the field of electron and semiconductor devices.
-
D.
Washington Treaty on Intellectual Property in Respect of Integrated Circuits
The Washington Treaty on Intellectual Property in Respect of Integrated Circuits is an international agreement that establishes specific intellectual property protections for the layout designs (topographies) of integrated circuits.
-
E.
IEEE 1149.1 JTAG boundary‑scan standard
The IEEE 1149.1 JTAG boundary-scan standard is a widely used test and debug specification that defines a serial interface and architecture for accessing and testing the internal logic and interconnects of integrated circuits and circuit boards.
- F. None of above. chosen
Statements (48)
| Predicate | Object |
|---|---|
| instanceOf |
forecasting report series
ⓘ
industry consortium project ⓘ technology roadmap ⓘ |
| abbreviation |
International Technology Roadmap for Semiconductors
self-linksurface differs
ⓘ
surface form:
ITRS
|
| access | publicly available ⓘ |
| basedOn |
Moore's law
ⓘ
surface form:
Moore's law scaling assumptions
|
| collaborativeWith |
equipment suppliers
ⓘ
global semiconductor manufacturers ⓘ materials suppliers ⓘ research institutions ⓘ |
| createdBy |
European Electronic Component Manufacturers Association
ⓘ
Korea Semiconductor Industry Association ⓘ Semiconductor Industry Association ⓘ Semiconductor Industry Association of Japan ⓘ Taiwan Semiconductor Industry Association ⓘ other regional semiconductor industry associations ⓘ |
| endTime | 2016 ⓘ |
| field |
integrated circuit technology
ⓘ
microelectronics ⓘ semiconductor industry ⓘ |
| focus |
CMOS scaling
ⓘ
design technology ⓘ emerging research devices ⓘ emerging research materials ⓘ interconnect technology ⓘ lithography ⓘ packaging ⓘ process integration ⓘ system-level integration ⓘ |
| geographicScope | global ⓘ |
| influenced |
academic semiconductor research directions
ⓘ
equipment development roadmaps ⓘ government research funding priorities ⓘ materials development roadmaps ⓘ semiconductor manufacturing strategies ⓘ |
| language | English ⓘ |
| output |
periodic roadmap reports
ⓘ
requirements tables ⓘ technology node projections ⓘ white papers ⓘ |
| publisher | ITRS organization ⓘ |
| purpose |
coordinate global semiconductor R&D priorities
ⓘ
forecast semiconductor technology trends ⓘ guide chip scaling and performance improvements ⓘ inform manufacturing technology development ⓘ |
| replacedBy |
International Technology Roadmap for Semiconductors
self-linksurface differs
ⓘ
surface form:
International Roadmap for Devices and Systems
|
| startTime | 1990s ⓘ |
| website | http://www.itrs2.net/ ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: International Technology Roadmap for Semiconductors Description of subject: The International Technology Roadmap for Semiconductors was a collaborative industry effort that forecasted and coordinated global semiconductor technology development, guiding research and manufacturing priorities for chip scaling and performance.
Referenced by (4)
Full triples — surface form annotated when it differs from this entity's canonical label.