Triple
T15999463
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Hitachi SH-4 |
E388057
|
entity |
| Predicate | predecessor |
P97
|
FINISHED |
| Object | Hitachi SH-3 |
E726423
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Hitachi SH-3 | Statement: [Hitachi SH-4, predecessor, Hitachi SH-3]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Hitachi SH-3 Context triple: [Hitachi SH-4, predecessor, Hitachi SH-3]
-
A.
Hitachi 6301
The Hitachi 6301 is an 8-bit microcontroller derived from the Motorola 6800 architecture, widely used in embedded systems and consumer electronics in the late 20th century.
-
B.
SH-3
chosen
SH-3 is a 32-bit member of the SuperH family of RISC microprocessor cores, designed for embedded systems and known for its compact, efficient instruction set.
-
C.
SH-20
SH-20 is a state highway in Oklahoma that runs east–west across the northeastern part of the state, connecting several towns and serving as a regional transportation route.
-
D.
SH-5
SH-5 is a 64-bit member of the SuperH family of RISC microprocessor cores designed for embedded and high-performance applications.
-
E.
SH-1
SH-1 is the first-generation implementation of the SuperH 32-bit RISC microprocessor architecture developed for embedded systems.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d86daa562c81908aacc179c0fe8fb5 |
completed | April 10, 2026, 3:25 a.m. |
| NER | Named-entity recognition | batch_69e1578a0adc819097c6a23514182173 |
completed | April 16, 2026, 9:41 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69ffc3d99ca08190a3d07a0802b1b24a |
completed | May 9, 2026, 11:31 p.m. |
Created at: April 10, 2026, 4:55 a.m.