instructionSetType
P9897
predicate
Indicates the type or category of an instruction set associated with a processor or computing architecture.
All labels observed (12)
| Label | Occurrences |
|---|---|
| supportsInstructionSet | 158 |
| instructionSet | 77 |
| instructionSetType canonical | 37 |
| hasInstructionType | 17 |
| instructionType | 8 |
| opcodeSet | 7 |
| containsInstructionType | 6 |
| includesInstructionType | 4 |
| instructionSetDesign | 4 |
| instructionSetStyle | 3 |
| cpuInstructionSet | 1 |
| instructionSetArchitectureType | 1 |
Description generation (PDg)
The one-sentence description above was generated by prompting gpt-5.1 with the predicate name and this instruction.
Instruction
Given a predicate that represents a relationship or action between entities, generate a one-sentence description explaining its meaning. # Instructions Focus on describing the relationship, not the entities themselves. # Response Format Begin the description with \' Indicates...\'
Input
Predicate: instructionSetType
Generated description
Indicates the type or category of an instruction set associated with a processor or computing architecture.
Sample triples (323)
| Subject | Object |
|---|---|
| Intel Core Duo | IA-32 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Core Duo | MMX via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core Duo | SSE via predicate surface "supportsInstructionSet" ⓘ |
| Intel Core Duo | SSE2 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Core Duo | SSE3 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Core Duo | Enhanced Intel SpeedStep Technology via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
|
Apollo Lake platform
surface form:
Apollo Lake
|
Intel 64 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
|
Apollo Lake platform
surface form:
Apollo Lake
|
SSE4.2 via predicate surface "supportsInstructionSet" ⓘ |
|
Apollo Lake platform
surface form:
Apollo Lake
|
Intel VT-x via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
|
Apollo Lake platform
surface form:
Apollo Lake
|
Intel VT-d via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
|
Apollo Lake platform
surface form:
Apollo Lake
|
Intel AES-NI via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
|
Apollo Lake platform
surface form:
Apollo Lake
|
Intel SGX via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
|
Intel Secure Key (RDRAND)
surface form:
Intel Secure Key
|
x86 via predicate surface "instructionSet" NERFINISHED ⓘ |
|
Intel Secure Key (RDRAND)
surface form:
Intel Secure Key
|
x86-64 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Pentium 4 | MMX via predicate surface "supportsInstructionSet" ⓘ |
| Pentium 4 | SSE via predicate surface "supportsInstructionSet" ⓘ |
| Pentium 4 | SSE2 via predicate surface "supportsInstructionSet" ⓘ |
| Pentium 4 | SSE3 via predicate surface "supportsInstructionSet" ⓘ |
| Cyrix 486 | IA-32 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Intel Pentium II | IA-32 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Pentium 75 | IA-32 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Intel Pentium 90 | IA-32 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Cherry Trail | x86-64 via predicate surface "supportsInstructionSet" ⓘ |
| Cherry Trail | Intel 64 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Cherry Trail | SSE4.1 via predicate surface "supportsInstructionSet" ⓘ |
| Cherry Trail | SSE4.2 via predicate surface "supportsInstructionSet" ⓘ |
| Cherry Trail | AES-NI via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Cherry Trail | Intel VT-x via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Pentium 100 | IA-32 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Intel Haswell microarchitecture | x86 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Haswell microarchitecture | x86-64 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Quark | IA-32 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Duron | x86 via predicate surface "instructionSet" NERFINISHED ⓘ |
| AMD K6-2 | IA-32 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Morgan | x86 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Morgan | MMX via predicate surface "supportsInstructionSet" ⓘ |
| Morgan | 3DNow! via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Morgan | Enhanced 3DNow! via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Morgan | SSE via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Pentium 120 | IA-32 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Pentium 120 | x86 via predicate surface "supportsInstructionSet" ⓘ |
| Intel Pentium 133 | IA-32 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Intel Pentium 133 | x87 FPU instructions via predicate surface "supportsInstructionSet" ⓘ |
| MMX | integer SIMD instructions ⓘ |
| Raptor Lake Refresh | x86-64 via predicate surface "supportsInstructionSet" ⓘ |
| Raptor Lake Refresh | Intel SSE via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |
| Raptor Lake Refresh | Intel AVX2 via predicate surface "supportsInstructionSet" ⓘ |
| Raptor Lake Refresh | Intel AVX-512 (limited / disabled on most desktop SKUs) via predicate surface "supportsInstructionSet" ⓘ |
| Palermo | x86 via predicate surface "instructionSet" NERFINISHED ⓘ |
| Intel Skylake microarchitecture | x86-64 via predicate surface "supportsInstructionSet" NERFINISHED ⓘ |