Intel Skylake microarchitecture
E653456
Intel Skylake microarchitecture is a generation of Intel CPU design that introduced significant performance, power efficiency, and security enhancements for desktop, mobile, and server processors.
All labels observed (1)
| Label | Occurrences |
|---|---|
| Intel Skylake microarchitecture canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T7279097 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Intel Skylake microarchitecture Context triple: [Intel SGX, introducedBy, Intel Skylake microarchitecture]
-
A.
Intel Haswell microarchitecture
The Intel Haswell microarchitecture is a generation of Intel CPU design that introduced significant performance and efficiency improvements over its predecessors, including enhanced vector processing, integrated graphics, and power management features.
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B.
Tiger Lake microarchitecture
Tiger Lake microarchitecture is Intel’s 11th-generation Core CPU design for laptops, featuring improved performance, power efficiency, and integrated Iris Xe graphics on a 10 nm SuperFin process.
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C.
Broadwell
Broadwell is a small rural village in Oxfordshire, England, known for its traditional Cotswold stone buildings and historic parish church.
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D.
Intel Elkhart Lake platform
The Intel Elkhart Lake platform is a family of low-power system-on-chips designed for embedded and IoT applications, featuring Intel’s Tremont CPU microarchitecture and enhanced graphics and security capabilities.
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E.
Raptor Lake
Raptor Lake is Intel’s 13th-generation Core microarchitecture for desktop and mobile processors, offering improved performance and efficiency over its Alder Lake predecessor.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: Intel Skylake microarchitecture Target entity description: Intel Skylake microarchitecture is a generation of Intel CPU design that introduced significant performance, power efficiency, and security enhancements for desktop, mobile, and server processors.
-
A.
Intel Haswell microarchitecture
The Intel Haswell microarchitecture is a generation of Intel CPU design that introduced significant performance and efficiency improvements over its predecessors, including enhanced vector processing, integrated graphics, and power management features.
-
B.
Tiger Lake microarchitecture
Tiger Lake microarchitecture is Intel’s 11th-generation Core CPU design for laptops, featuring improved performance, power efficiency, and integrated Iris Xe graphics on a 10 nm SuperFin process.
-
C.
Broadwell
Broadwell is a small rural village in Oxfordshire, England, known for its traditional Cotswold stone buildings and historic parish church.
-
D.
Intel Elkhart Lake platform
The Intel Elkhart Lake platform is a family of low-power system-on-chips designed for embedded and IoT applications, featuring Intel’s Tremont CPU microarchitecture and enhanced graphics and security capabilities.
-
E.
Raptor Lake
Raptor Lake is Intel’s 13th-generation Core microarchitecture for desktop and mobile processors, offering improved performance and efficiency over its Alder Lake predecessor.
- F. None of above. chosen
Statements (57)
| Predicate | Object |
|---|---|
| instanceOf | CPU microarchitecture ⓘ |
| announcementDate | 2015 ⓘ |
| branchPrediction | improved branch predictor over Broadwell ⓘ |
| cacheConfiguration |
L1 data cache 32 KB per core
ⓘ
L1 instruction cache 32 KB per core ⓘ L2 cache 256 KB per core ⓘ shared L3 cache up to several MB ⓘ |
| codename | Skylake NERFINISHED ⓘ |
| developer | Intel NERFINISHED ⓘ |
| executionPorts | 8 ⓘ |
| followedBy | Intel Kaby Lake microarchitecture NERFINISHED ⓘ |
| integratedGraphicsArchitecture | Intel Gen9 graphics NERFINISHED ⓘ |
| integratedGraphicsBrand |
Intel HD Graphics 500 series
NERFINISHED
ⓘ
Intel Iris Graphics 500 series NERFINISHED ⓘ |
| marketIntroductionYear | 2015 ⓘ |
| marketSegment |
consumer
ⓘ
enterprise ⓘ mobile ⓘ |
| maxMemoryChannels |
2 (client variants)
ⓘ
4 (server variants) ⓘ |
| microarchitectureFamily | Intel Core NERFINISHED ⓘ |
| notableFeature |
enhanced security features including SGX and MPX
ⓘ
improved power efficiency compared to Broadwell ⓘ new Speed Shift hardware-controlled P-state transitions ⓘ support for DDR4 memory on mainstream desktop platform ⓘ |
| performanceImprovementOverPredecessor | higher IPC than Broadwell ⓘ |
| pipelineWidth | 4-wide decode ⓘ |
| powerOptimization | finer-grained power gating ⓘ |
| precededBy | Intel Broadwell microarchitecture ⓘ |
| processNode | 14 nm ⓘ |
| processTechnology | Intel 14nm process ⓘ |
| securityVulnerability |
affected by L1TF (Foreshadow)
ⓘ
affected by Spectre ⓘ |
| securityVulnerability | affected by Meltdown ⓘ |
| socket | LGA 1151 ⓘ |
| supportsInstructionSet | x86-64 NERFINISHED ⓘ |
| supportsInstructionSetExtension |
AES-NI
NERFINISHED
ⓘ
AVX2 NERFINISHED ⓘ FMA3 ⓘ Intel MPX NERFINISHED ⓘ Intel SGX NERFINISHED ⓘ SSE4.1 ⓘ SSE4.2 NERFINISHED ⓘ TSX-NI NERFINISHED ⓘ |
| supportsMemoryType |
DDR3L
ⓘ
DDR4 ⓘ |
| supportsTechnology |
Intel Hyper-Threading Technology
NERFINISHED
ⓘ
Intel Speed Shift NERFINISHED ⓘ Intel Turbo Boost 2.0 NERFINISHED ⓘ Intel VT-d NERFINISHED ⓘ Intel VT-x NERFINISHED ⓘ |
| targetPlatform |
desktop computers
ⓘ
mobile computers ⓘ servers ⓘ |
| usedInProductLine |
6th generation Intel Core processors
ⓘ
Intel Xeon E3 v5 series NERFINISHED ⓘ Intel Xeon scalable processors (Skylake-SP) NERFINISHED ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: Intel Skylake microarchitecture Description of subject: Intel Skylake microarchitecture is a generation of Intel CPU design that introduced significant performance, power efficiency, and security enhancements for desktop, mobile, and server processors.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.