Bluespec SystemVerilog

E820860

hardware description language high-level hardware description language

Bluespec SystemVerilog is a high-level hardware description language that extends Verilog with rule-based, functional programming concepts to enable more abstract and formally verifiable hardware design.

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Statements (49)

Predicate	Object
instanceOf	hardware description language ⓘ high-level hardware description language ⓘ
basedOn	Verilog NERFINISHED ⓘ
category	electronic design automation technology ⓘ
designedFor	digital hardware design ⓘ high-level synthesis ⓘ register-transfer level design ⓘ
developedBy	Bluespec Inc. NERFINISHED ⓘ
enables	formally verifiable hardware design ⓘ more abstract hardware design ⓘ
extends	Verilog NERFINISHED ⓘ
formerlyKnownAs	Bluespec NERFINISHED ⓘ
hasAbbreviation	BSV NERFINISHED ⓘ
hasFeature	concurrency via rules ⓘ formal verification support ⓘ guarded atomic actions ⓘ implicit scheduling of rules ⓘ interfaces ⓘ module composition via interfaces ⓘ parameterized modules ⓘ rules ⓘ scheduling analysis ⓘ strong static typing ⓘ synthesis to VHDL ⓘ synthesis to Verilog ⓘ
influencedBy	Haskell NERFINISHED ⓘ term rewriting systems ⓘ
provides	cycle-accurate RTL output ⓘ static checking of rule conflicts ⓘ synthesizable Verilog output ⓘ
relatedTo	Chisel NERFINISHED ⓘ SystemVerilog NERFINISHED ⓘ Verilog NERFINISHED ⓘ high-level synthesis languages ⓘ
supports	cycle-accurate hardware modeling ⓘ formal reasoning about concurrency ⓘ modular hardware design ⓘ parameterized hardware components ⓘ rule-based hardware design ⓘ transaction-level modeling ⓘ
targetDomain	ASIC design ⓘ FPGA design ⓘ hardware accelerators ⓘ processor design ⓘ
usedFor	designing complex digital systems ⓘ designing hardware accelerators for algorithms ⓘ designing processors and SoCs ⓘ
usesProgrammingParadigm	functional programming ⓘ rule-based programming ⓘ

Referenced by (1)

Full triples — surface form annotated when it differs from this entity's canonical label.

Verilog → influenced → Bluespec SystemVerilog ⓘ