ARM SVE
E732964
ARM SVE (Scalable Vector Extension) is an ARM architecture extension that provides flexible, length-agnostic vector processing capabilities aimed at high-performance computing and data-intensive workloads.
Observed surface forms (3)
| Surface form | Occurrences |
|---|---|
| ARM SVE2 | 1 |
| Scalable Vector Extension | 1 |
| Scalable Vector Extension 2 | 1 |
Statements (51)
| Predicate | Object |
|---|---|
| instanceOf | instruction set architecture extension ⓘ |
| abbreviation | SVE ⓘ |
| architectureFamily | ARMv8-A NERFINISHED ⓘ |
| designGoal |
enable portable performance across different vector widths
ⓘ
improve SIMD performance for HPC workloads ⓘ support auto-vectorization by compilers ⓘ |
| developer | Arm Ltd. NERFINISHED ⓘ |
| executionMode | AArch64 only ⓘ |
| fullName | ARM Scalable Vector Extension NERFINISHED ⓘ |
| includesFeature |
predicate registers
ⓘ
vector arithmetic instructions ⓘ vector bitwise operations ⓘ vector compare instructions ⓘ vector condition flags ⓘ vector load/store instructions ⓘ vector permute instructions ⓘ vector reduction instructions ⓘ |
| introducedFor | ARMv8-A AArch64 state NERFINISHED ⓘ |
| keyFeature |
gather-load and scatter-store operations
ⓘ
length-agnostic vector programming model ⓘ per-lane predication masks ⓘ scalable vector length ⓘ support for integer and floating-point vector operations ⓘ vector predication ⓘ vectorization of loops with unknown trip counts ⓘ vectorized complex arithmetic support ⓘ vectorized gather-scatter for irregular memory access patterns ⓘ vectorized horizontal operations ⓘ vectorized reduction operations ⓘ |
| programmingModel | vector-length agnostic ⓘ |
| registerCount | 32 vector registers ⓘ |
| registerType | vector registers ⓘ |
| registerWidth | implementation-defined vector length ⓘ |
| standardizedBy | Arm ARM (Architecture Reference Manual) for ARMv8-A NERFINISHED ⓘ |
| successor | ARM SVE2 NERFINISHED ⓘ |
| supportsDataTypes |
16-bit floating point
ⓘ
16-bit integer ⓘ 32-bit floating point ⓘ 32-bit integer ⓘ 64-bit floating point ⓘ 64-bit integer ⓘ 8-bit integer ⓘ |
| targetDomain |
data-intensive workloads
ⓘ
high-performance computing ⓘ |
| toolchainSupport |
Arm Compiler for Linux
NERFINISHED
ⓘ
GCC NERFINISHED ⓘ LLVM/Clang NERFINISHED ⓘ |
| usedIn |
Fugaku supercomputer
NERFINISHED
ⓘ
Fujitsu A64FX processor NERFINISHED ⓘ |
| vectorLengthGranularityBits | 128 ⓘ |
| vectorLengthRangeBits | 128–2048 ⓘ |
Referenced by (4)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
ARM SVE2
this entity surface form:
Scalable Vector Extension 2
subject surface form:
Fugaku
this entity surface form:
Scalable Vector Extension