von Neumann architecture | DisamKB

von Neumann architecture

E14971

computer architecture stored-program architecture

The von Neumann architecture is a foundational computer design model in which a single memory stores both program instructions and data, executed sequentially by a central processing unit.

Aliases (1)

von Neumann bottleneck ×1

Statements (47)

Predicate	Object
instanceOf	computer architecture → stored-program architecture →
appliedIn	EDVAC → IAS machine → most personal computers → most servers → most workstations →
characterizedBy	sequential processing → shared bus for data and instructions → stored-program concept → von Neumann bottleneck →
contrastedWith	Harvard architecture →
dateProposed	1945 →
documentedIn	First Draft of a Report on the EDVAC →
enables	programs as data → self-modifying code →
hasComponent	arithmetic logic unit → central processing unit → control unit → input unit → memory → output unit →
hasGoal	flexible general-purpose computation →
hasInfluenceOn	CPU design → computer organization textbooks → memory hierarchy design → programming language implementation →
hasLimitation	instruction and data contention on same bus → memory bandwidth bottleneck →
implementedBy	general-purpose CPUs → microprocessors →
influenced	early electronic computers → modern general-purpose computers →
namedAfter	John von Neumann →
relatedTo	control flow → instruction set architecture → stored-program computer →
stores	data in memory → program instructions in memory →
supports	imperative programming languages → sequential programming model →
uses	binary representation of data → fetch-decode-execute cycle → program counter → sequential instruction execution → single address space for code and data → single shared memory for instructions and data →

Referenced by (5)

Subject (surface form when different)	Predicate
EDVAC → First Draft of a Report on the EDVAC →	influenced
IAS machine →	architecture
von Neumann architecture ("von Neumann bottleneck") →	characterizedBy
John von Neumann →	knownFor