Triple

T9783012

Position	Surface form	Disambiguated ID	Type / Status
Subject	Xilinx	`E237421`	entity
Predicate	product	`P490`	FINISHED
Object	Vivado Design Suite Vivado Design Suite is Xilinx’s integrated development environment for designing, simulating, and implementing digital circuits on its FPGA and SoC devices.	`E822028`	NE FINISHED

Provenance (5 batches)

Stage	Batch ID	Job type	Status
creating	`batch_69ca84da927881909bda80caecad6010`	elicitation	completed
NER	`batch_69cda1b5714481908bf74b8bf3e4e6e8`	ner	completed
NED1	`batch_69d1c41fc5508190a759cdda8416673a`	ned_source_triple	completed
NED2	`batch_69d1c5a1cfb08190b6c16e5309dbf2b8`	ned_description	completed
NEDg	`batch_69d1c53b888081908ecb01884f064b80`	nedg	completed

Created at: March 30, 2026, 8:27 p.m.