Triple
T8286692
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | SuperH |
E193802
|
entity |
| Predicate | hasVersion |
P455
|
FINISHED |
| Object |
SH-1
SH-1 is the first-generation implementation of the SuperH 32-bit RISC microprocessor architecture developed for embedded systems.
|
E724208
|
NE FINISHED |
Provenance (5 batches)
| Stage | Batch ID | Job type | Status |
|---|---|---|---|
| creating | batch_69ca82e32db481908b72f3804fa71152 |
elicitation | completed |
| NER | batch_69cb7ad3722481908076508908d18621 |
ner | completed |
| NED1 | batch_69cd688441908190b6b0a39dfb9d87ac |
ned_source_triple | completed |
| NED2 | batch_69cd7e2bdae08190adc51e904e85695e |
ned_description | completed |
| NEDg | batch_69cd6d55196881909cf5ec925792e09f |
nedg | completed |
Created at: March 30, 2026, 5:52 p.m.