Triple
T25550447
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | AVX-512 |
E640424
|
entity |
| Predicate | opmaskRegisterWidth |
P4121
|
FINISHED |
| Object | 64-bit |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: 64-bit | Statement: [AVX-512, opmaskRegisterWidth, 64-bit]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: opmaskRegisterWidth Context triple: [AVX-512, opmaskRegisterWidth, 64-bit]
-
A.
opmaskRegisterCount
Indicates the number of operand mask registers involved or required in the operation.
-
B.
extendsRegisterWidthFrom
Indicates that one entity increases or broadens the register width relative to another entity from which it is derived.
-
C.
bitWidth
chosen
Indicates the number of bits used to represent or encode a given value, type, or data element.
-
D.
numberOfGeneralPurposeRegisters
Indicates the quantity of general-purpose registers associated with or available in a given computing context.
-
E.
encodingWidth
Indicates the width dimension used when encoding a signal, image, or data stream.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69e75dc101a881909fd33b02174e9768 |
completed | April 21, 2026, 11:21 a.m. |
| NER | Named-entity recognition | batch_69f5f8c583e48190a2a1f65d80a2b589 |
completed | May 2, 2026, 1:14 p.m. |
| PD | Predicate disambiguation | batch_69f480789be08190ab252a6de3797200 |
completed | May 1, 2026, 10:29 a.m. |
Created at: April 21, 2026, 3:36 p.m.