Triple
T1936696
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | AIM alliance |
E41457
|
entity |
| Predicate | relatedConcept |
P37
|
FINISHED |
| Object |
RISC architecture
RISC architecture is a CPU design philosophy that uses a small, highly optimized set of simple instructions to achieve high performance and efficiency.
|
E220200
|
NE FINISHED |
Provenance (5 batches)
| Stage | Batch ID | Job type | Status |
|---|---|---|---|
| creating | batch_69a88649b24c819080047f26b6db2ded |
elicitation | completed |
| NER | batch_69abb2c5f6e481909b2d95861e2098f9 |
ner | completed |
| NED1 | batch_69adfbb52d04819097c3df9691551aaa |
ned_source_triple | completed |
| NED2 | batch_69adfd713c4081908a2fae2fada76dae |
ned_description | completed |
| NEDg | batch_69adfc1a62b48190b01d81718c827abf |
nedg | completed |
Created at: March 4, 2026, 7:35 p.m.