Triple
T1717904
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | RISC-V |
E37329
|
entity |
| Predicate | hasBaseISA |
P31905
|
FINISHED |
| Object |
RV64I
RV64I is the 64-bit base integer instruction set architecture of the open RISC-V processor family, defining its core operations and programming model.
|
E37329
|
NE FINISHED |
Provenance (5 batches)
| Stage | Batch ID | Job type | Status |
|---|---|---|---|
| creating | batch_69a8861912dc8190931af43b4b9158a7 |
elicitation | completed |
| NER | batch_69abaffc4e5c81908ce0b9cfe833445e |
ner | completed |
| NED1 | batch_69ada0d3a1508190bf05aa45e9966c49 |
ned_source_triple | completed |
| NED2 | batch_69ada23515d08190833ad1a35bb7a265 |
ned_description | completed |
| NEDg | batch_69ada1a2122481909c7a3470e090af17 |
nedg | completed |
Created at: March 4, 2026, 7:30 p.m.