Triple

Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).

Phrase: Universal Verification Methodology | Statement: [SystemVerilog, usedWith, Universal Verification Methodology]

Target entity: Universal Verification Methodology
Context triple: [SystemVerilog, usedWith, Universal Verification Methodology]

• A. Verifiable Random Function
  A Verifiable Random Function (VRF) is a cryptographic primitive that produces pseudo-random outputs along with proofs that anyone can verify to confirm the outputs were correctly generated from a given input and secret key.
• B. Program Verification: Approaches and Tools
  "Program Verification: Approaches and Tools" is a foundational work in computer science that systematically presents methods and practical techniques for proving the correctness of software programs.
• C. CB-Full Certification Scheme
  The CB-Full Certification Scheme is an international conformity assessment program under the IECEE that enables comprehensive testing and certification of electrical and electronic products for global market access.
• D. Universal Composability framework
  The Universal Composability framework is a foundational cryptographic security model that enables protocols to remain secure even when composed with arbitrary other protocols running concurrently.
• E. IEEE 1012 (Software Verification and Validation)
  IEEE 1012 (Software Verification and Validation) is an IEEE standard that defines processes and requirements for systematically verifying and validating software and system products throughout their life cycle.
• F. None of above. chosen
• G. Unsure - the case is ambiguous/there is not enough information to decide.

Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"

Entity: Universal Verification Methodology
Triple: [SystemVerilog, usedWith, Universal Verification Methodology]

Universal Verification Methodology is a standardized, SystemVerilog-based framework for building reusable, modular, and scalable testbenches to verify complex digital hardware designs.

Target entity: Universal Verification Methodology
Target entity description: Universal Verification Methodology is a standardized, SystemVerilog-based framework for building reusable, modular, and scalable testbenches to verify complex digital hardware designs.

• A. Verifiable Random Function
  A Verifiable Random Function (VRF) is a cryptographic primitive that produces pseudo-random outputs along with proofs that anyone can verify to confirm the outputs were correctly generated from a given input and secret key.
• B. Program Verification: Approaches and Tools
  "Program Verification: Approaches and Tools" is a foundational work in computer science that systematically presents methods and practical techniques for proving the correctness of software programs.
• C. CB-Full Certification Scheme
  The CB-Full Certification Scheme is an international conformity assessment program under the IECEE that enables comprehensive testing and certification of electrical and electronic products for global market access.
• D. Universal Composability framework
  The Universal Composability framework is a foundational cryptographic security model that enables protocols to remain secure even when composed with arbitrary other protocols running concurrently.
• E. IEEE 1012 (Software Verification and Validation)
  IEEE 1012 (Software Verification and Validation) is an IEEE standard that defines processes and requirements for systematically verifying and validating software and system products throughout their life cycle.
• F. None of above. chosen