Triple
T12048425
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Apple A17 Pro |
E286847
|
entity |
| Predicate | fabricationNode |
P5125
|
FINISHED |
| Object | TSMC N3B |
E286845
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: TSMC N3B | Statement: [Apple A17 Pro, fabricationNode, TSMC N3B]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: TSMC N3B Context triple: [Apple A17 Pro, fabricationNode, TSMC N3B]
-
A.
TSMC N3B
chosen
TSMC N3B is an advanced 3-nanometer semiconductor manufacturing process variant developed by TSMC, optimized for high-performance, power-efficient chips used in cutting-edge mobile devices.
-
B.
TSMC N5
TSMC N5 is Taiwan Semiconductor Manufacturing Company’s 5-nanometer-class process technology node, widely used for advanced high-performance and mobile chips.
-
C.
TSMC N7P
TSMC N7P is an enhanced 7-nanometer semiconductor manufacturing process from TSMC that offers improved performance and power efficiency over its predecessor and is used for advanced mobile and computing chips.
-
D.
TSMC N4
TSMC N4 is an enhanced 5 nm-class semiconductor manufacturing process node from Taiwan Semiconductor Manufacturing Company, offering improved performance and density over its earlier 5 nm technologies.
-
E.
TSMC 4N
TSMC 4N is a custom 5 nm-class semiconductor manufacturing process co-developed by TSMC and NVIDIA, optimized specifically for NVIDIA’s latest GPUs to improve performance, power efficiency, and density over previous nodes.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d6ab4780948190bdb9f7620c2ac27e |
completed | April 8, 2026, 7:23 p.m. |
| NER | Named-entity recognition | batch_69d904211b588190bfc7603e5b33dcb7 |
completed | April 10, 2026, 2:07 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69f62a7a77648190ab2d6bd48821d190 |
completed | May 2, 2026, 4:46 p.m. |
Created at: April 8, 2026, 9:47 p.m.