Triple
T12048340
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | TSMC N3B |
E286845
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | 3-nanometer process node |
C24281
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: 3-nanometer process node Context triple: [TSMC N3B, instanceOf, 3-nanometer process node]
-
A.
NAND flash memory
NAND flash memory is a type of non-volatile storage technology that stores data in arrays of memory cells using floating-gate transistors, optimized for high-density, low-cost, and fast read/write operations commonly used in SSDs, USB drives, and memory cards.
-
B.
CMOS microprocessor
A CMOS microprocessor is a central processing unit implemented using complementary metal-oxide-semiconductor technology, providing high integration, low power consumption, and reliable digital computation on a single chip.
-
C.
semiconductor manufacturing process
chosen
The semiconductor manufacturing process is a highly controlled, multi-step sequence of fabrication, patterning, doping, and layering operations used to transform raw silicon wafers into functional integrated circuits and microchips.
-
D.
integrated circuit technology
Integrated circuit technology is the design and fabrication of miniaturized electronic circuits on semiconductor chips, enabling complex, high-speed, and low-power electronic systems.
-
E.
computer chip
A computer chip is a small, integrated electronic circuit composed of microscopic components that processes and stores data to perform computational tasks within electronic devices.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d6ab4780948190bdb9f7620c2ac27e |
completed | April 8, 2026, 7:23 p.m. |
Created at: April 8, 2026, 9:47 p.m.