hasInstructionSet
P78644
predicate
Indicates that one entity (typically a processor or system) is defined as using or supporting a particular instruction set.
Observed surface forms (10)
- supportsInstructionSetExtensions ×7
- supportedInstructionSet ×5
- supportedInstructionSetExtensions ×4
- usesInstructionSet ×4
- toInstructionSet ×3
- instructionSetFamily ×2
- sourceInstructionSet ×1
- supportsSSE4.2 ×1
- targetInstructionSet ×1
- underlyingInstructionSet ×1
Sample triples (34)
| Subject | Object |
|---|---|
| Code Morphing Software | VLIW via predicate surface "targetInstructionSet" ⓘ |
| Code Morphing Software | x86 via predicate surface "sourceInstructionSet" NERFINISHED ⓘ |
| Crusoe microprocessor | proprietary VLIW instruction set via predicate surface "underlyingInstructionSet" ⓘ |
| ICL 2900 series | 2900 architecture instruction set via predicate surface "instructionSetFamily" ⓘ |
| Intel Core i3-10100Y | yes via predicate surface "supportsSSE4.2" ⓘ |
| Intel Core m3-8100Y | AVX2 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Intel Core m3-8100Y | SSE4.1 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Intel Core m3-8100Y | SSE4.2 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| MIXAL | MIX instruction set NERFINISHED ⓘ |
| MMIX | MMIX instruction set ⓘ |
| PDP-11 | PDP-11 instruction set ⓘ |
| PIC microcontrollers | proprietary PIC instruction set ⓘ |
| PowerPC-to-Intel Mac architecture transition | IA-32 via predicate surface "toInstructionSet" NERFINISHED ⓘ |
| PowerPC-to-Intel Mac architecture transition | x86 via predicate surface "toInstructionSet" NERFINISHED ⓘ |
| PowerPC-to-Intel Mac architecture transition | x86-64 via predicate surface "toInstructionSet" ⓘ |
| Prescott | MMX via predicate surface "supportedInstructionSet" NERFINISHED ⓘ |
| Prescott | SSE via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | SSE2 via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | SSE3 via predicate surface "supportedInstructionSet" ⓘ |
| Prescott | x86 via predicate surface "supportedInstructionSet" NERFINISHED ⓘ |
| R3000 | MIPS I via predicate surface "instructionSetFamily" NERFINISHED ⓘ |
| Samsung Exynos SoCs |
ARMv7-A architecture
via predicate surface "usesInstructionSet"
ⓘ
surface form:
ARMv7-A
|
| Samsung Exynos SoCs | ARMv8-A via predicate surface "usesInstructionSet" ⓘ |
| Samsung Exynos SoCs | ARMv9-A via predicate surface "usesInstructionSet" ⓘ |
| Samsung Xclipse | AMD RDNA shader ISA via predicate surface "usesInstructionSet" NERFINISHED ⓘ |
| Socket AM2 | AMD64 via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM2 | NX bit via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM2 | SSE2 via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM2 | SSE3 via predicate surface "supportedInstructionSetExtensions" ⓘ |
| Socket AM3 | AMD64 via predicate surface "supportsInstructionSetExtensions" NERFINISHED ⓘ |
| Socket AM3 | SSE2 via predicate surface "supportsInstructionSetExtensions" ⓘ |
| Socket AM3 | SSE3 via predicate surface "supportsInstructionSetExtensions" NERFINISHED ⓘ |
| Socket AM3 | SSE4a via predicate surface "supportsInstructionSetExtensions" ⓘ |
|
SuperH-5 (SH-5)
surface form:
SuperH-5
|
SuperH-5 ISA NERFINISHED ⓘ |