l1CacheSize
P75828
predicate
Indicates the size or capacity of an entity’s level-1 (L1) cache memory.
Observed surface forms (7)
- l1CachePerCore ×2
- l1DataCachePerCore ×2
- L1CacheTotal ×1
- L1DCachePerCore ×1
- L1DataCachePerCore ×1
- L1ICachePerCore ×1
- dataCacheSize ×1
Sample triples (11)
| Subject | Object |
|---|---|
| A13 Bionic | 128 KB via predicate surface "l1DataCachePerCore" ⓘ |
| Intel Pentium Gold 4415Y | 128 KB ⓘ |
| K10 microarchitecture | 64 KB data cache via predicate surface "l1CachePerCore" ⓘ |
| K10 microarchitecture | 64 KB instruction cache via predicate surface "l1CachePerCore" ⓘ |
| Morgan | 128 KB L1 cache via predicate surface "L1CacheTotal" ⓘ |
|
Motorola 68030 microprocessor
surface form:
Motorola 68030
|
256 bytes via predicate surface "dataCacheSize" ⓘ |
| P54C | 16 KB ⓘ |
| UltraSPARC T1 | 8 KB via predicate surface "L1DataCachePerCore" ⓘ |
| UltraSPARC T2 | 8 KB via predicate surface "l1DataCachePerCore" ⓘ |
| Zen 3 | 32 KB via predicate surface "L1ICachePerCore" ⓘ |
| Zen 3 | 32 KB via predicate surface "L1DCachePerCore" ⓘ |