K10 microarchitecture
E1033646
K10 microarchitecture is AMD's second-generation Phenom-era CPU design that improved performance and efficiency over the earlier K8 architecture in desktop and server processors.
All labels observed (1)
| Label | Occurrences |
|---|---|
| K10 microarchitecture canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T13320183 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: K10 microarchitecture Context triple: [Phenom, architectureFamily, K10 microarchitecture]
-
A.
Intel Skylake microarchitecture
Intel Skylake microarchitecture is a generation of Intel CPU design that introduced significant performance, power efficiency, and security enhancements for desktop, mobile, and server processors.
-
B.
Nehalem microarchitecture
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
-
C.
Intel Haswell microarchitecture
The Intel Haswell microarchitecture is a generation of Intel CPU design that introduced significant performance and efficiency improvements over its predecessors, including enhanced vector processing, integrated graphics, and power management features.
-
D.
Raptor Lake
Raptor Lake is Intel’s 13th-generation Core microarchitecture for desktop and mobile processors, offering improved performance and efficiency over its Alder Lake predecessor.
-
E.
Silvermont
Silvermont is Intel's low-power microarchitecture designed for energy-efficient processors used primarily in mobile and embedded devices.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: K10 microarchitecture Target entity description: K10 microarchitecture is AMD's second-generation Phenom-era CPU design that improved performance and efficiency over the earlier K8 architecture in desktop and server processors.
-
A.
Intel Skylake microarchitecture
Intel Skylake microarchitecture is a generation of Intel CPU design that introduced significant performance, power efficiency, and security enhancements for desktop, mobile, and server processors.
-
B.
Nehalem microarchitecture
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
-
C.
Intel Haswell microarchitecture
The Intel Haswell microarchitecture is a generation of Intel CPU design that introduced significant performance and efficiency improvements over its predecessors, including enhanced vector processing, integrated graphics, and power management features.
-
D.
Raptor Lake
Raptor Lake is Intel’s 13th-generation Core microarchitecture for desktop and mobile processors, offering improved performance and efficiency over its Alder Lake predecessor.
-
E.
Silvermont
Silvermont is Intel's low-power microarchitecture designed for energy-efficient processors used primarily in mobile and embedded devices.
- F. None of above. chosen
Statements (58)
| Predicate | Object |
|---|---|
| instanceOf |
AMD microarchitecture
ⓘ
CPU microarchitecture ⓘ |
| alsoKnownAs |
AMD K10
NERFINISHED
ⓘ
Family 10h microarchitecture ⓘ |
| architectureFamily | x86-64 ⓘ |
| coreCountPerDie | 4 ⓘ |
| coreDesign | native quad-core design ⓘ |
| developer | Advanced Micro Devices NERFINISHED ⓘ |
| feature |
enhanced power management
ⓘ
improved branch prediction over K8 ⓘ improved memory controller latency ⓘ integrated northbridge on-die ⓘ out-of-order execution ⓘ shared L3 cache between cores ⓘ split power planes for cores and northbridge ⓘ wider prefetchers compared to K8 ⓘ |
| firstReleaseYear | 2007 ⓘ |
| floatingPointUnit | 128-bit wide FPU ⓘ |
| goal |
improve energy efficiency over K8
ⓘ
improve performance over K8 ⓘ |
| integrates |
DDR2 memory controller
ⓘ
HyperTransport 3.0 link NERFINISHED ⓘ |
| l1CachePerCore |
64 KB data cache
ⓘ
64 KB instruction cache ⓘ |
| l2CachePerCore | 512 KB ⓘ |
| l3CacheShared |
up to 2 MB
ⓘ
up to 6 MB ⓘ |
| marketSegment |
desktop processors
ⓘ
mobile processors ⓘ server processors ⓘ |
| notableModel |
Opteron 2350
NERFINISHED
ⓘ
Phenom II X4 940 NERFINISHED ⓘ Phenom X4 9600 NERFINISHED ⓘ |
| pipelineDepth | 12-stage integer pipeline ⓘ |
| predecessor | K8 microarchitecture ⓘ |
| processNode |
45 nm
ⓘ
65 nm ⓘ |
| successor | Bulldozer microarchitecture NERFINISHED ⓘ |
| supportsInstructionSet |
x86
NERFINISHED
ⓘ
x86-64 ⓘ |
| supportsInstructionSetExtension |
ABM
ⓘ
AMD-V NERFINISHED ⓘ AMD64 NERFINISHED ⓘ Cool’n’Quiet 2.0 NERFINISHED ⓘ Enhanced 3DNow! NERFINISHED ⓘ MMX NERFINISHED ⓘ NX bit ⓘ SSE ⓘ SSE2 ⓘ SSE3 NERFINISHED ⓘ SSE4a NERFINISHED ⓘ |
| usedIn |
AMD Athlon II processors
NERFINISHED
ⓘ
AMD Opteron 2300 series NERFINISHED ⓘ AMD Opteron 8300 series NERFINISHED ⓘ AMD Phenom II processors NERFINISHED ⓘ AMD Phenom processors NERFINISHED ⓘ AMD Sempron (K10-based) processors NERFINISHED ⓘ AMD Turion II processors NERFINISHED ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: K10 microarchitecture Description of subject: K10 microarchitecture is AMD's second-generation Phenom-era CPU design that improved performance and efficiency over the earlier K8 architecture in desktop and server processors.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.