L1CacheType
P158297
predicate
Indicates the specific configuration or design category of a system’s Level 1 cache in relation to how it stores and accesses data or instructions.
All labels observed (2)
| Label | Occurrences |
|---|---|
| L1CacheType canonical | 6 |
| L1CacheSplit | 4 |
Description generation (PDg)
The one-sentence description above was generated by prompting gpt-5.1 with the predicate name and this instruction.
Instruction
Given a predicate that represents a relationship or action between entities, generate a one-sentence description explaining its meaning. # Instructions Focus on describing the relationship, not the entities themselves. # Response Format Begin the description with \' Indicates...\'
Input
Predicate: L1CacheType
Generated description
Indicates the specific configuration or design category of a system’s Level 1 cache in relation to how it stores and accesses data or instructions.
Sample triples (10)
| Subject | Object |
|---|---|
| Intel Pentium II | split instruction and data cache ⓘ |
| Duron | 64 KB instruction cache via predicate surface "L1CacheSplit" ⓘ |
| Duron | 64 KB data cache via predicate surface "L1CacheSplit" ⓘ |
| Intel Pentium 133 | 8 KB instruction cache via predicate surface "L1CacheSplit" ⓘ |
| Intel Pentium 133 | 8 KB data cache via predicate surface "L1CacheSplit" ⓘ |
| Sparta | split instruction and data cache ⓘ |
| Paris | split instruction and data cache ⓘ |
| Prescott | trace cache for instructions ⓘ |
| McKinley | separate instruction and data caches ⓘ |
| POWER4 | separate instruction and data caches ⓘ |