SH-5

E727375

64-bit processor architecture RISC microprocessor core microprocessor architecture

SH-5 is a 64-bit member of the SuperH family of RISC microprocessor cores designed for embedded and high-performance applications.

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Observed surface forms (1)

Surface form	Occurrences
SuperH SH-5	1

Predicate	Object
instanceOf	64-bit processor architecture ⓘ RISC microprocessor core ⓘ microprocessor architecture ⓘ
architectureFamily	SuperH NERFINISHED ⓘ
backwardCompatibilityWith	earlier SuperH architectures ⓘ
bitWidth	64-bit ⓘ
cpuArchitectureType	RISC ⓘ
designedFor	embedded applications ⓘ high-performance applications ⓘ
hasFeature	embedded-oriented power consumption characteristics ⓘ fixed-length instructions ⓘ interrupt handling ⓘ memory management unit ⓘ on-chip cache ⓘ pipelined execution ⓘ
instructionSetArchitecture	SuperH ISA NERFINISHED ⓘ
optimizedFor	code density ⓘ low power consumption ⓘ real-time performance ⓘ
partOf	SuperH family NERFINISHED ⓘ
supports	32-bit code ⓘ 64-bit code ⓘ C language toolchains ⓘ RISC-style load-store operations ⓘ embedded operating systems ⓘ
usedIn	consumer electronics ⓘ embedded systems ⓘ industrial control systems ⓘ networking equipment ⓘ

Full triples — surface form annotated when it differs from this entity's canonical label.

SuperH → hasVersion → SH-5 ⓘ

Hitachi SH-4 → successor → SH-5 ⓘ

this entity surface form: SuperH SH-5