Altera Hardware Description Language

E660949

Altera Hardware Description Language (AHDL) is a proprietary hardware description language developed by Altera for designing and implementing digital logic circuits on its programmable logic devices.

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Statements (45)

Predicate Object
instanceOf hardware description language
proprietary language
abbreviation AHDL NERFINISHED
associatedWithCompanyEvent Intel acquisition of Altera in 2015
category electronic design automation technology
competesWith SystemVerilog NERFINISHED
VHDL NERFINISHED
Verilog NERFINISHED
designEntryMethod text-based design entry
developer Altera Corporation NERFINISHED
Intel (after acquisition of Altera) NERFINISHED
documentationProvidedBy Altera Corporation NERFINISHED
Intel PSG NERFINISHED
domain digital circuit design
executionModel compiled to configuration bitstream for PLDs
hasFeature built-in primitives for Altera devices
device-specific megafunctions
support for logic equations
support for pin assignments
support for state machine tables
support for timing specifications
support for truth tables
languageParadigm behavioral hardware description
dataflow description
structural hardware description
notFullyStandardizedBy IEEE NERFINISHED
primaryUsers FPGA designers
digital hardware engineers
proprietaryTo Altera Corporation NERFINISHED
supportedByTool Altera MAX+PLUS II NERFINISHED
Altera Quartus II NERFINISHED
Intel Quartus Prime NERFINISHED
supports combinational logic description
hierarchical design
parameterized design
sequential logic description
state machines
targetPlatform Altera CPLDs NERFINISHED
Altera FPGAs NERFINISHED
Altera programmable logic devices NERFINISHED
typicalFileExtension .tdf
usedFor CPLD design
FPGA design
design of digital logic circuits
design of programmable logic devices

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MAX+PLUS II supportsLanguage Altera Hardware Description Language