EPT (Extended Page Tables)
E653442
EPT (Extended Page Tables) is an Intel hardware-assisted memory virtualization technology that allows virtual machines to manage guest-physical to host-physical address translations more efficiently, reducing overhead and improving performance.
Observed surface forms (1)
| Surface form | Occurrences |
|---|---|
| EPT | 0 |
Statements (49)
| Predicate | Object |
|---|---|
| instanceOf |
hardware-assisted memory virtualization technology
ⓘ
second-level address translation mechanism ⓘ |
| allows |
guest OS to manage its own page tables
ⓘ
hypervisor to maintain separate EPT structures ⓘ |
| alsoKnownAs |
Extended Page Table
NERFINISHED
ⓘ
Intel EPT NERFINISHED ⓘ |
| benefits |
better scalability with many virtual machines
ⓘ
more efficient context switching between VMs ⓘ reduced VM exit frequency for memory operations ⓘ |
| category | virtualization technology ⓘ |
| configuredBy | hypervisor software ⓘ |
| developedBy | Intel NERFINISHED ⓘ |
| documentedIn | Intel 64 and IA-32 Architectures Software Developer’s Manual NERFINISHED ⓘ |
| enables | guest-physical to host-physical address translation ⓘ |
| fullName | Extended Page Tables NERFINISHED ⓘ |
| granularity | page-level control of guest-physical memory mappings ⓘ |
| implementedAs | set of page tables managed by the hypervisor ⓘ |
| improves |
performance of memory-intensive workloads in VMs
ⓘ
virtual machine performance ⓘ |
| introducedBy | Intel VT-x with EPT extensions NERFINISHED ⓘ |
| operatesAt | second level of address translation ⓘ |
| partOf | Intel VT-x NERFINISHED ⓘ |
| purpose |
to accelerate memory virtualization
ⓘ
to reduce virtualization overhead for memory translations ⓘ |
| reduces | overhead of shadow page tables ⓘ |
| relatedTo |
AMD Nested Page Tables
NERFINISHED
ⓘ
AMD RVI NERFINISHED ⓘ Intel VT-d NERFINISHED ⓘ Intel VT-x NERFINISHED ⓘ |
| replaces | shadow page tables in many hypervisor implementations ⓘ |
| requires |
BIOS or firmware support to enable VT-x and EPT
ⓘ
processor support for Intel VT-x ⓘ |
| scope | applies only when Intel VT-x is active ⓘ |
| securityConsideration |
can be used by hypervisors to enforce memory isolation between VMs
ⓘ
has been involved in some side-channel and EPT-based attack research ⓘ |
| supports | hardware-assisted paging for virtual machines ⓘ |
| supportsFeature |
execute permissions per page
ⓘ
execute-disable for pages ⓘ large pages ⓘ nested paging ⓘ read permissions per page ⓘ write permissions per page ⓘ |
| usedBy |
KVM hypervisor on Intel processors
ⓘ
Microsoft Hyper-V on Intel processors NERFINISHED ⓘ VMware ESXi on Intel processors ⓘ Xen hypervisor on Intel processors NERFINISHED ⓘ |
| usedIn |
hypervisors
ⓘ
server virtualization platforms ⓘ virtual machine monitors ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.