x87 FPU
E637383
The x87 FPU is the dedicated floating-point coprocessor architecture used in IA-32 processors to perform hardware-accelerated arithmetic on real and complex numbers.
All labels observed (2)
| Label | Occurrences |
|---|---|
| Intel 80287 | 2 |
| x87 FPU canonical | 2 |
How this entity was disambiguated
This entity first appeared as the object of triple T7032578 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: x87 FPU Context triple: [IA-32, floatingPointUnit, x87 FPU]
-
A.
x86
x86 is a widely used family of backward-compatible instruction set architectures for computer processors, originally developed by Intel and forming the basis of most desktop and laptop CPUs.
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B.
VFP floating-point extension
The VFP floating-point extension is an ARM architecture coprocessor feature that provides hardware support for high-performance single- and double-precision floating-point arithmetic.
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C.
CP1 floating-point coprocessor
The CP1 floating-point coprocessor is a dedicated hardware unit used in MIPS architectures to perform floating-point arithmetic operations efficiently.
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D.
Intel i860
The Intel i860 was a high-performance RISC microprocessor from the late 1980s and early 1990s, notable for its VLIW-like architecture and integrated floating-point and graphics capabilities aimed at workstations and supercomputers.
-
E.
Intel 80186
The Intel 80186 is a 16-bit microprocessor introduced in the early 1980s that integrated additional peripherals and control functions onto the CPU die, making it popular for embedded systems rather than mainstream personal computers.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: x87 FPU Target entity description: The x87 FPU is the dedicated floating-point coprocessor architecture used in IA-32 processors to perform hardware-accelerated arithmetic on real and complex numbers.
-
A.
x86
x86 is a widely used family of backward-compatible instruction set architectures for computer processors, originally developed by Intel and forming the basis of most desktop and laptop CPUs.
-
B.
VFP floating-point extension
The VFP floating-point extension is an ARM architecture coprocessor feature that provides hardware support for high-performance single- and double-precision floating-point arithmetic.
-
C.
CP1 floating-point coprocessor
The CP1 floating-point coprocessor is a dedicated hardware unit used in MIPS architectures to perform floating-point arithmetic operations efficiently.
-
D.
Intel i860
The Intel i860 was a high-performance RISC microprocessor from the late 1980s and early 1990s, notable for its VLIW-like architecture and integrated floating-point and graphics capabilities aimed at workstations and supercomputers.
-
E.
Intel 80186
The Intel 80186 is a 16-bit microprocessor introduced in the early 1980s that integrated additional peripherals and control functions onto the CPU die, making it popular for embedded systems rather than mainstream personal computers.
- F. None of above. chosen
Statements (65)
| Predicate | Object |
|---|---|
| instanceOf |
IA-32 architecture component
ⓘ
coprocessor architecture ⓘ floating-point unit ⓘ |
| alsoKnownAs |
8087-compatible FPU
ⓘ
x87 coprocessor NERFINISHED ⓘ x87 floating-point unit NERFINISHED ⓘ |
| designedFor | IA-32 NERFINISHED ⓘ |
| extendedPrecisionWidth | 80-bit extended precision ⓘ |
| hasControlRegister | x87 control word ⓘ |
| hasInstructionSetPrefix | FPU instructions starting with F ⓘ |
| hasRegisterStack | 8 ⓘ |
| hasStatusRegister | x87 status word ⓘ |
| hasTagRegister | x87 tag word ⓘ |
| integratedInto | Intel 80486 NERFINISHED ⓘ |
| introducedBy | Intel NERFINISHED ⓘ |
| introducedWith | Intel 8087 NERFINISHED ⓘ |
| largelySupersededBy |
SSE floating-point
NERFINISHED
ⓘ
SSE2 floating-point NERFINISHED ⓘ |
| previouslyImplementedAs | separate coprocessor chip ⓘ |
| registerModel | stack-based ⓘ |
| registerWidth | 80-bit ⓘ |
| separateCoprocessorModels |
80287
ⓘ
80387 ⓘ 8087 ⓘ |
| stillPresentIn | modern x86 CPUs for backward compatibility ⓘ |
| supports |
complex number arithmetic
ⓘ
exponential functions ⓘ floating-point arithmetic ⓘ floating-point comparisons ⓘ floating-point exceptions ⓘ integer arithmetic instructions ⓘ logarithmic functions ⓘ real number arithmetic ⓘ transcendental functions ⓘ trigonometric functions ⓘ |
| supportsDataType |
floating-point
ⓘ
integer ⓘ packed BCD ⓘ |
| supportsInstruction |
FABS
ⓘ
FADD ⓘ FCHS ⓘ FCOS NERFINISHED ⓘ FDIV ⓘ FINIT ⓘ FLD ⓘ FMUL ⓘ FPTAN ⓘ FSIN ⓘ FSQRT ⓘ FST ⓘ FSUB ⓘ FWAIT ⓘ FXCH ⓘ FYL2X NERFINISHED ⓘ |
| supportsPrecision |
double precision
ⓘ
extended precision ⓘ single precision ⓘ |
| supportsRoundingMode |
round down
ⓘ
round to nearest ⓘ round toward zero ⓘ round up ⓘ |
| usedBy | legacy x86 software ⓘ |
| usedIn |
IA-32 processors
ⓘ
x86 processors NERFINISHED ⓘ |
| usesFormat | IEEE 754-like formats NERFINISHED ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: x87 FPU Description of subject: The x87 FPU is the dedicated floating-point coprocessor architecture used in IA-32 processors to perform hardware-accelerated arithmetic on real and complex numbers.
Referenced by (4)
Full triples — surface form annotated when it differs from this entity's canonical label.