Intel Pentium Pro
E163313
The Intel Pentium Pro is a sixth-generation x86 microprocessor introduced in the mid-1990s, notable for its advanced out-of-order execution and on-package L2 cache, and primarily targeted at servers and high-end workstations.
All labels observed (1)
| Label | Occurrences |
|---|---|
| Intel Pentium Pro canonical | 2 |
Statements (60)
| Predicate | Object |
|---|---|
| instanceOf |
microprocessor
ⓘ
sixth-generation x86 microprocessor ⓘ x86 microprocessor ⓘ |
| addressBusWidth | 36-bit ⓘ |
| architecture | x86 ⓘ |
| branchPrediction | dynamic branch prediction ⓘ |
| cacheCoherencyProtocol | MESI ⓘ |
| clockSpeed |
150 MHz
ⓘ
166 MHz ⓘ 180 MHz ⓘ 200 MHz ⓘ |
| codename | P6 ⓘ |
| coreCount | 1 ⓘ |
| dataBusWidth | 64-bit ⓘ |
| designedFor | 32-bit software optimization ⓘ |
| family |
Intel Pentium
ⓘ
surface form:
Pentium
|
| influenced |
Intel Pentium II
ⓘ
later P6-family processors ⓘ |
| instructionSet | IA-32 ⓘ |
| introductionDate | 1995-11 ⓘ |
| introductionYear | 1995 ⓘ |
| L1CacheSize |
8 KB data cache
ⓘ
8 KB instruction cache ⓘ |
| L2CacheSize |
1 MB
ⓘ
256 KB ⓘ 512 KB ⓘ |
| L2CacheType | external die in same package ⓘ |
| manufacturer |
Intel Corporation
ⓘ
surface form:
Intel
|
| marketSegment |
high-end desktops
ⓘ
servers ⓘ workstations ⓘ |
| maxSMPConfiguration | 4-way SMP (typical OEM systems) ⓘ |
| microarchitecture | P6 ⓘ |
| notableFeature |
dynamic execution
ⓘ
integrated L2 cache on separate die in same package ⓘ on-package L2 cache ⓘ out-of-order execution ⓘ register renaming ⓘ speculative execution ⓘ superpipelined design ⓘ superscalar execution ⓘ |
| packageType | ceramic multi-chip module ⓘ |
| performanceCharacteristic |
high performance on 32-bit code
ⓘ
relatively lower performance on 16-bit legacy code ⓘ |
| pipelineDepth | 14-stage pipeline ⓘ |
| predecessor | Intel Pentium ⓘ |
| processTechnology |
0.28 µm
ⓘ
0.35 µm ⓘ 0.60 µm ⓘ |
| socket | Socket 8 ⓘ |
| successor | Intel Pentium II ⓘ |
| supports |
32-bit protected mode
ⓘ
MMX (no) ⓘ paging ⓘ |
| supportsMultiprocessing | yes ⓘ |
| transistorCount |
15.5 million (with 256 KB L2)
ⓘ
5.5 million (CPU die) ⓘ |
| usedIn |
high-end workstations
ⓘ
servers ⓘ |
| wordSize | 32-bit ⓘ |
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.