Triple
T9690187
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | AMD Radeon GCN-based GPU |
E234516
|
entity |
| Predicate | predecessor |
P97
|
FINISHED |
| Object |
AMD TeraScale architecture
AMD TeraScale architecture is a previous-generation GPU microarchitecture from AMD used in earlier Radeon graphics cards, known for introducing a unified shader design before being succeeded by the GCN architecture.
|
E815655
|
NE FINISHED |
How this triple was built (4 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: AMD TeraScale architecture | Statement: [AMD Radeon GCN-based GPU, predecessor, AMD TeraScale architecture]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: AMD TeraScale architecture Context triple: [AMD Radeon GCN-based GPU, predecessor, AMD TeraScale architecture]
-
A.
SGI Altix ICE architecture
SGI Altix ICE architecture is a high-performance computing platform designed by Silicon Graphics for scalable, cluster-based supercomputers using industry-standard components and advanced interconnects.
-
B.
Xe-HPG microarchitecture
Xe-HPG microarchitecture is Intel’s high-performance gaming-oriented GPU architecture designed to power its discrete Arc graphics cards with advanced features like hardware-accelerated ray tracing.
-
C.
AMD Opteron
AMD Opteron is a family of 64-bit x86 server and workstation processors from AMD designed for high-performance, multi-core, and multi-processor computing environments.
-
D.
Nehalem microarchitecture
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
-
E.
J-Core architecture
J-Core architecture is an open-source, FPGA-oriented implementation of the SuperH-compatible CPU design used in embedded systems and hobbyist hardware projects.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg
Description generation
gpt-5.1
Instruction
Generate a one-sentence description of the target entity. You are given a context triple in the form (subject, predicate, object), where the object is the target entity. # Instructions Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. Avoid repeating the information from the triple, unless really essential. # Response Format Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: AMD TeraScale architecture Triple: [AMD Radeon GCN-based GPU, predecessor, AMD TeraScale architecture]
Generated description
AMD TeraScale architecture is a previous-generation GPU microarchitecture from AMD used in earlier Radeon graphics cards, known for introducing a unified shader design before being succeeded by the GCN architecture.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: AMD TeraScale architecture Target entity description: AMD TeraScale architecture is a previous-generation GPU microarchitecture from AMD used in earlier Radeon graphics cards, known for introducing a unified shader design before being succeeded by the GCN architecture.
-
A.
SGI Altix ICE architecture
SGI Altix ICE architecture is a high-performance computing platform designed by Silicon Graphics for scalable, cluster-based supercomputers using industry-standard components and advanced interconnects.
-
B.
Xe-HPG microarchitecture
Xe-HPG microarchitecture is Intel’s high-performance gaming-oriented GPU architecture designed to power its discrete Arc graphics cards with advanced features like hardware-accelerated ray tracing.
-
C.
AMD Opteron
AMD Opteron is a family of 64-bit x86 server and workstation processors from AMD designed for high-performance, multi-core, and multi-processor computing environments.
-
D.
Nehalem microarchitecture
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
-
E.
J-Core architecture
J-Core architecture is an open-source, FPGA-oriented implementation of the SuperH-compatible CPU design used in embedded systems and hobbyist hardware projects.
- F. None of above. chosen
Provenance (5 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69ca84ca73208190957a900c8543bdcc |
completed | March 30, 2026, 2:12 p.m. |
| NER | Named-entity recognition | batch_69cd9d02b20881909d7c0d5d6aaafcb0 |
completed | April 1, 2026, 10:32 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69d19118874c81909a97f874b1dc2db8 |
completed | April 4, 2026, 10:30 p.m. |
| NEDg | Description generation | batch_69d193a5cdac8190b84564f397d00124 |
completed | April 4, 2026, 10:41 p.m. |
| NED2 | Entity disambiguation (via description) | batch_69d19457c6488190a7bc72e1a27c088a |
completed | April 4, 2026, 10:44 p.m. |
Created at: March 30, 2026, 8:17 p.m.