Triple

T8414927
Position Surface form Disambiguated ID Type / Status
Subject ARMv8 cryptographic extensions E198708 entity
Predicate usesRegisterFile P4184 FINISHED
Object ARMv8-A SIMD and floating-point registers E229087 NE FINISHED

Named-entity recognition

Before disambiguation, gpt-5-mini classified whether the object phrase is a named entity — the step behind the object's NE type shown above.

Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: ARMv8-A SIMD and floating-point registers | Statement: [ARMv8 cryptographic extensions, usesRegisterFile, ARMv8-A SIMD and floating-point registers]

Disambiguation candidates (1 decision)

The exact options the model was shown at each disambiguation step, with the option it chose highlighted — the evidence behind this triple's disambiguated ids.

NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07 
Target entity: ARMv8-A SIMD and floating-point registers
Context triple: [ARMv8 cryptographic extensions, usesRegisterFile, ARMv8-A SIMD and floating-point registers]
  • A. ARMv8-A chosen
    ARMv8-A is a 64-bit ARM processor architecture generation that introduces the AArch64 execution state and underpins many modern mobile and desktop CPUs.
  • B. ARMv9-A
    ARMv9-A is a modern 64-bit ARM architecture generation that introduces enhanced performance, security, and AI-focused features for advanced processors used in devices like Apple’s M-series chips.
  • C. ARMv8 cryptographic extensions
    ARMv8 cryptographic extensions are a set of hardware instructions in the ARMv8 architecture designed to accelerate common cryptographic operations such as AES and SHA for improved performance and security.
  • D. NEON SIMD
    NEON SIMD is ARM's advanced Single Instruction, Multiple Data (SIMD) instruction set extension designed to accelerate multimedia, signal processing, and other parallelizable workloads on ARM processors.
  • E. MIPS SIMD extensions
    MIPS SIMD extensions are a set of vector-processing instructions for the MIPS architecture designed to accelerate multimedia, signal processing, and other data-parallel workloads.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

Stage Batch ID Job type Status
creating batch_69ca831201b481909e137936ef99ff11 elicitation completed
NER batch_69cb83e443a08190983d9a0a61e0f781 ner completed
NED1 batch_69ce032a25ec819094c6346eb2a7f973 ned_source_triple completed
Created at: March 30, 2026, 6:06 p.m.