Triple

T8284447
Position Surface form Disambiguated ID Type / Status
Subject QEMU RISC-V target E193755 entity
Predicate supportsCPUModel P31542 FINISHED
Object generic RISC-V CPU LITERAL FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: generic RISC-V CPU | Statement: [QEMU RISC-V target, supportsCPUModel, generic RISC-V CPU]
PD Predicate disambiguation gpt-5-mini-2025-08-07
Target predicate: supportsCPUModel
Context triple: [QEMU RISC-V target, supportsCPUModel, generic RISC-V CPU]
  • A. cpuModel chosen
    Indicates the specific processor model associated with a given computing device or system.
  • B. supportsIntel64
    Indicates that one entity provides compatibility with or operational support for Intel 64-bit (x86-64) architecture in relation to another entity.
  • C. hasHardwareCompatibilityWith
    Indicates that two hardware components or systems can operate together correctly and reliably without conflicts or incompatibilities.
  • D. supportedArchitect
    Indicates that one entity provides architectural backing, endorsement, or assistance to another entity or architectural concept.
  • E. supportsProcessorFamily
    Indicates that one entity (such as hardware or software) is compatible with and can operate using a specified processor family.
  • F. None of above.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69ca82e217a48190880695635c44b2ed completed March 30, 2026, 2:04 p.m.
NER Named-entity recognition batch_69cb7ad0535081908bb234cfc0e32b32 completed March 31, 2026, 7:42 a.m.
PD Predicate disambiguation batch_69cb70ad9fc081908741f8c4a4141edf completed March 31, 2026, 6:58 a.m.
Created at: March 30, 2026, 5:52 p.m.