Triple
T8283988
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Berkeley RISC projects |
E193746
|
entity |
| Predicate | hasPart |
P35
|
FINISHED |
| Object |
SPUR (Symbolic Processing Using RISC)
SPUR (Symbolic Processing Using RISC) was a research project at UC Berkeley that explored high-performance symbolic and Lisp-oriented computing using RISC-based architectures.
|
E193746
|
NE FINISHED |
How this triple was built (4 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SPUR (Symbolic Processing Using RISC) | Statement: [Berkeley RISC projects, hasPart, SPUR (Symbolic Processing Using RISC)]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: SPUR (Symbolic Processing Using RISC) Context triple: [Berkeley RISC projects, hasPart, SPUR (Symbolic Processing Using RISC)]
-
A.
SPARC microprocessor architecture
The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
-
B.
UCSD p-System
UCSD p-System is a portable operating system and programming environment based on the Pascal language and p-code virtual machine, widely used in the late 1970s and early 1980s across multiple hardware platforms.
-
C.
Berkeley RISC projects
The Berkeley RISC projects were pioneering academic research efforts at the University of California, Berkeley that developed early Reduced Instruction Set Computer architectures, profoundly influencing modern processor design.
-
D.
Acorn RISC Machine
Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
-
E.
SPIM
SPIM was the former ICAO airport code for Jorge Chávez International Airport in Lima, Peru, before it was changed to SPJC.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg
Description generation
gpt-5.1
Instruction
Generate a one-sentence description of the target entity. You are given a context triple in the form (subject, predicate, object), where the object is the target entity. # Instructions Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. Avoid repeating the information from the triple, unless really essential. # Response Format Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: SPUR (Symbolic Processing Using RISC) Triple: [Berkeley RISC projects, hasPart, SPUR (Symbolic Processing Using RISC)]
Generated description
SPUR (Symbolic Processing Using RISC) was a research project at UC Berkeley that explored high-performance symbolic and Lisp-oriented computing using RISC-based architectures.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: SPUR (Symbolic Processing Using RISC) Target entity description: SPUR (Symbolic Processing Using RISC) was a research project at UC Berkeley that explored high-performance symbolic and Lisp-oriented computing using RISC-based architectures.
-
A.
SPARC microprocessor architecture
The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
-
B.
UCSD p-System
UCSD p-System is a portable operating system and programming environment based on the Pascal language and p-code virtual machine, widely used in the late 1970s and early 1980s across multiple hardware platforms.
-
C.
Berkeley RISC projects
chosen
The Berkeley RISC projects were pioneering academic research efforts at the University of California, Berkeley that developed early Reduced Instruction Set Computer architectures, profoundly influencing modern processor design.
-
D.
Acorn RISC Machine
Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
-
E.
SPIM
SPIM was the former ICAO airport code for Jorge Chávez International Airport in Lima, Peru, before it was changed to SPJC.
- F. None of above.
Provenance (5 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69ca82e217a48190880695635c44b2ed |
completed | March 30, 2026, 2:04 p.m. |
| NER | Named-entity recognition | batch_69cb7ad0535081908bb234cfc0e32b32 |
completed | March 31, 2026, 7:42 a.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69cd687e64a08190a45a1cf5f5c32291 |
completed | April 1, 2026, 6:48 p.m. |
| NEDg | Description generation | batch_69cd6d55196881909cf5ec925792e09f |
completed | April 1, 2026, 7:09 p.m. |
| NED2 | Entity disambiguation (via description) | batch_69cd7e20f71c8190959319c6683a2810 |
completed | April 1, 2026, 8:20 p.m. |
Created at: March 30, 2026, 5:52 p.m.