Triple
T7394181
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Synopsys |
E170579
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | Semiconductor intellectual property company |
C3679
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: Semiconductor intellectual property company Context triple: [Synopsys, instanceOf, Semiconductor intellectual property company]
-
A.
Fabless semiconductor company
chosen
A fabless semiconductor company is a business that designs and sells integrated circuits and other semiconductor devices while outsourcing the actual manufacturing to specialized fabrication plants (foundries).
-
B.
Intel subsidiary
An Intel subsidiary is a legally distinct company that is majority-owned and controlled by Intel Corporation to support its strategic, operational, or market objectives.
-
C.
integrated circuit technology
Integrated circuit technology is the design and fabrication of miniaturized electronic circuits on semiconductor chips, enabling complex, high-speed, and low-power electronic systems.
-
D.
Consumer electronics company
A consumer electronics company is a business that designs, manufactures, markets, and sells electronic devices and gadgets for everyday personal and household use.
-
E.
semiconductor engineer
A semiconductor engineer designs, develops, and optimizes microelectronic devices and integrated circuits by applying principles of materials science, electrical engineering, and manufacturing processes.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69c68a5f04188190ac266569c9280347 |
completed | March 27, 2026, 1:47 p.m. |
Created at: March 27, 2026, 3:09 p.m.