Triple
T7387925
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Stratix |
E170427
|
entity |
| Predicate | hasSuccessorFamily |
P71053
|
FINISHED |
| Object |
Stratix V
Stratix V is a high-performance FPGA family from Intel (formerly Altera) designed for advanced signal processing, high-speed networking, and compute-intensive applications.
|
E170427
|
NE FINISHED |
How this triple was built (4 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Stratix V | Statement: [Stratix, hasSuccessorFamily, Stratix V]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Stratix V Context triple: [Stratix, hasSuccessorFamily, Stratix V]
-
A.
Stratix
Stratix is a high-performance family of field-programmable gate arrays (FPGAs) designed by Altera (now part of Intel) for demanding digital logic and signal processing applications.
-
B.
Cyclone V
Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
-
C.
Cyclone IV
Cyclone IV is a family of low-cost, low-power FPGA devices from Intel (formerly Altera) designed for high-volume, cost-sensitive applications.
-
D.
Cyclone II
Cyclone II is a family of Altera (now Intel) FPGA devices designed as a successor to the original Cyclone series, offering higher performance and greater logic density for cost-sensitive applications.
-
E.
Altera HardCopy family
The Altera HardCopy family is a line of structured ASIC devices that provide a low-cost, high-performance, and power-efficient migration path from Altera FPGAs to volume production.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg
Description generation
gpt-5.1
Instruction
Generate a one-sentence description of the target entity. You are given a context triple in the form (subject, predicate, object), where the object is the target entity. # Instructions Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. Avoid repeating the information from the triple, unless really essential. # Response Format Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: Stratix V Triple: [Stratix, hasSuccessorFamily, Stratix V]
Generated description
Stratix V is a high-performance FPGA family from Intel (formerly Altera) designed for advanced signal processing, high-speed networking, and compute-intensive applications.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: Stratix V Target entity description: Stratix V is a high-performance FPGA family from Intel (formerly Altera) designed for advanced signal processing, high-speed networking, and compute-intensive applications.
-
A.
Stratix
chosen
Stratix is a high-performance family of field-programmable gate arrays (FPGAs) designed by Altera (now part of Intel) for demanding digital logic and signal processing applications.
-
B.
Cyclone V
Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
-
C.
Cyclone IV
Cyclone IV is a family of low-cost, low-power FPGA devices from Intel (formerly Altera) designed for high-volume, cost-sensitive applications.
-
D.
Cyclone II
Cyclone II is a family of Altera (now Intel) FPGA devices designed as a successor to the original Cyclone series, offering higher performance and greater logic density for cost-sensitive applications.
-
E.
Altera HardCopy family
The Altera HardCopy family is a line of structured ASIC devices that provide a low-cost, high-performance, and power-efficient migration path from Altera FPGAs to volume production.
- F. None of above.
Provenance (5 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69c68a5e2c9081909e713ce866e0060a |
completed | March 27, 2026, 1:47 p.m. |
| NER | Named-entity recognition | batch_69c6f4eb5c808190ba08956bcf297ea8 |
completed | March 27, 2026, 9:21 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69c8343c1b308190b4ba681158b54aba |
completed | March 28, 2026, 8:04 p.m. |
| NEDg | Description generation | batch_69c8350e9b748190ae0761ee82d3d94a |
completed | March 28, 2026, 8:07 p.m. |
| NED2 | Entity disambiguation (via description) | batch_69c83597d0f0819091a095e8376fd644 |
completed | March 28, 2026, 8:10 p.m. |
Created at: March 27, 2026, 3:09 p.m.