Triple

T7278953
Position Surface form Disambiguated ID Type / Status
Subject Intel AVX E163100 entity
Predicate predecessor P97 FINISHED
Object SSE4.2
SSE4.2 is an Intel x86 instruction set extension that adds advanced string, text-processing, and CRC instructions to improve performance in multimedia, gaming, and data-processing applications.
 E658517 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SSE4.2 | Statement: [Intel AVX, predecessor, SSE4.2]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07 
Target entity: SSE4.2
Context triple: [Intel AVX, predecessor, SSE4.2]
  • A. SSE4.1
    SSE4.1 is an Intel SIMD instruction set extension that adds advanced vector, integer, and floating-point operations to improve performance in multimedia, graphics, and data-processing applications.
  • B. SSE2
    SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
  • C. SSE3
    SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
  • D. SSSE3
    SSSE3 (Supplemental Streaming SIMD Extensions 3) is an Intel SIMD instruction set extension that enhances performance for multimedia, signal processing, and other parallelizable workloads.
  • E. Intel AVX2
    Intel AVX2 is an x86 instruction set extension from Intel that enhances performance for integer-heavy and vectorized workloads through wider SIMD operations and new vector instructions.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: SSE4.2
Triple: [Intel AVX, predecessor, SSE4.2]
Generated description
SSE4.2 is an Intel x86 instruction set extension that adds advanced string, text-processing, and CRC instructions to improve performance in multimedia, gaming, and data-processing applications.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07 
Target entity: SSE4.2
Target entity description: SSE4.2 is an Intel x86 instruction set extension that adds advanced string, text-processing, and CRC instructions to improve performance in multimedia, gaming, and data-processing applications.
  • A. SSE4.1
    SSE4.1 is an Intel SIMD instruction set extension that adds advanced vector, integer, and floating-point operations to improve performance in multimedia, graphics, and data-processing applications.
  • B. SSE2
    SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
  • C. SSE3
    SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
  • D. SSSE3
    SSSE3 (Supplemental Streaming SIMD Extensions 3) is an Intel SIMD instruction set extension that enhances performance for multimedia, signal processing, and other parallelizable workloads.
  • E. Intel AVX2
    Intel AVX2 is an x86 instruction set extension from Intel that enhances performance for integer-heavy and vectorized workloads through wider SIMD operations and new vector instructions.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69c6885c5964819085b209701769877f completed March 27, 2026, 1:38 p.m.
NER Named-entity recognition batch_69c6eb3251808190bd9da71bc183c945 completed March 27, 2026, 8:40 p.m.
NED1 Entity disambiguation (via context triple) batch_69c7fa6d84b88190916b1d9ddb0d1d0d completed March 28, 2026, 3:57 p.m.
NEDg Description generation batch_69c7fc13167c819084ff05d780fc4394 completed March 28, 2026, 4:04 p.m.
NED2 Entity disambiguation (via description) batch_69c7fd453fac8190862000bd670b5695 completed March 28, 2026, 4:09 p.m.
Created at: March 27, 2026, 2:59 p.m.